Font Size: a A A

Research On Power Network Low-noise Synchronous Acquisition System

Posted on:2011-10-14Degree:MasterType:Thesis
Country:ChinaCandidate:M L HuangFull Text:PDF
GTID:2178330338481057Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the development of power system, and people's needs for production and living, the government investments in the power system industry are increasing year by year, network capacity has been upgraded, the national power network interconnection construction is accelerating. Meanwhile, with the development of modern power electronic technology, more and more nonlinear loads are put into use. These and other reasons have made the instability of the power grid deteriorating. Therefore, accurate and real-time collection of power grid data and fast and efficient delivery of it become particularly important today. To get accurate power data, it is necessary to improve collection accuracy and reduce introduction of noise during acquisition. To improve the transmission efficiency of the power network data, it is required that data should be compressed before sending, which demands for reasonable choice for sampling methods according to the characteristics of power grid, to help better storage and compression. For the above two requirements, this paper does some research on the power network low-noise synchronous acquisition system.The paper first introduces the commonly used sampling methods for power system, synchronization and non-synchronous sampling methods. By comparing the experimental results, the advantages of synchronous sampling are highlighted. And synchronization acquisition system topology is designed.In the signal conditioning section, transformer, EMI filter, anti-aliasing filter and the shaping circuit are designed, and noises are analyzed. In the data acquisition section, sample and hold circuit and related noise reduction measures are discussed, so as other key indicators. And then High Performance Analog Multiplexers and AD-chip peripheral circuits are designed. In the frequency synchronization part, the paper mainly introduces the design of PLL circuit, which is used for tracking the power frequency and generating sample trigger pulses.
Keywords/Search Tags:power system, low noise, synchronized sampling, data acquisition
PDF Full Text Request
Related items