The Structural Design And Implementation Of H.264 Encoder Based On TMS320DM642 DSP

With the increasing popularization of the Internet, the wide use of the 3G mobile communication technology and the rapid development of the multimedia operation, video applications have been expanding quickly. Thus, a high quality and high efficient embedded video compression system has not only theoretical significance, but also practical value. As the excellent compression performance, H.264 becomes the primary video coding standard in various application fields, such as video real-time communication, DVB and network video stream media. On the other hand, rapid development of the digital signal processor (DSP) makes the portable digital video communication terminals possible. With the strong signal processing ability and perfect interfaces of video, audio and network, TMS320DM642, developed by TI Corporation, is an ideal platform for the implementation of H.264 encoder. The main achievements of this paper are focused on the implementation and optimization of H.264 encoder based on DM642 platform.The paper studies and analyzes the various frame structure of H.264 encoder. According to the characteristics of DM642 memory architecture and cache access mechanism, the paper designs a structure of H.264 encoder, which is suitable for DM642. The structure adopts the idea of partitioning and reducing condition judgments to increase the work efficiency of the program. In order to make full use of the DSP chip resource and decrease the unnecessary expense, the paper analyzes the difference sizes of encoder's inter prediction strategy and chooses the best inter prediction algorithm. While keeping the quality of the video reconstructed frame, the encoder proposed by the paper improves the encoding speed.At the same time, according to the characteristic of DM642 platform, this paper transplants and optimizes the program. Firstly, the paper optimizes the data memory structure by proposing a kind of row-cache and line-cache mechanism combined with the high speed cache data structure. The data memory mechanism can increase the rate of data cache hit and utilization. Secondly, on the basis of the results of performance analysis, several techniques such as compiler option, inline function, data packing and software pipeline are adopted synthetically in the process of H.264 encoder optimization.The experimental results indicate that compared with X264, the H.264 encoder based on the DM642 platform, which is designed and optimized by the paper, keeps the quality reduction from 0.4 to 0.6dB as well as gets about 30fps encoding speed for CIF format. As the encoding speed has improved nearly 1 time, the encoder has achieved the objective of CIF format real-time encoding.