The Design Of A SOI CMOS Voltage Transform Circuit

With the rapid development of portable electronic product ,power management has been playing an essential role. Most of the power management chips are used of body silicon CMOS technology ,but with the shrinking of integrated circuit 's feature size ,traditional body silicon device has some new problems. SOI(Silicon On Insulator)technology overcomes the deficiency of body silicon devices and shows the potential of silicon integrated circuit technology fully.The CMOS voltage transform circuits that are suitable for integration with 0.35μm PDSOI CMOS technology are investigated. This study begins with a short description of the characteristics and application of SOI technology, and goes on to evaluate and compare the main three kinds of power management technology. As a result, the LDO linear regulators are chosen to transform the voltage from 5V to 3.3 V . So far as we know, traditional LDO requires a larger piece of external capacitor, in order to conquer this, a transient enhancement circuitry is added to make the capacitance compatible with other circuits. Moreover, a bandgap reference without resistors that can save lots of layout area is provided . Based on the 0.35μm PDSOI BSIM model, the electrical response and layout of whole circuit are presented . The results indicate that the maximum overshoots of output voltage is less than 180mV when the load current changes instantly from 0mA to 100mA or from 100mA to 0mA , and the output voltage also has good line regulation and load regulation with the vary of input voltage and load current.