Modeling And Simulation Of 1553B Bus System

As a kind of universal avionics bus, the highest data rate of 1553B is only 1Mbps, which can hardly meet the increasing data throughput of advanced electronic equipment. Theoretically, by improving the system clock to 2 MHz, 4 MHz or a higher level, this problem can be effectively solved. But due to the special structure of 1553B bus and the harsh military operational environment, strict theoretical analysis and simulation should be done before a new standard is proposed.Based on the sufficient study on 1553B protocol and the related knowledge of electromagnetism and signal integrity (SI), circuit models for discrete components of 1553B bus (such as transformer, shielded twisted pair cable and remote terminal) were proposed. Then, according to the topological structure, system models with two terminals and multiple terminals were made and simulated. Finally, some opinions to modify the 1553B protocol were discussed as the frequency of system clock was increased to 2MHz. By comparing the simulation results with test data, it is shown that the modeling method presented in this paper is accurate. The method provides a simulation strategy to analyze and define protocol at 2/4Mbps or a higher data rate under condition that the hardware of the data bus is not changed.