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Failure Analysis And Reliability Research Of Power VDMOS Transistor

Posted on:2011-07-03Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q HeFull Text:PDF
GTID:2178330332471471Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With a low price, high input resistance, fast switching speed, good thermal stability and other characteristics, power VDMOS device is the mainstream of today's power semiconductor devices, and is widely used in the civilian and military electronics industry. Currently, improve the reliability of the device is becoming a research hotspot at home and abroad. In this paper, high temperature cycle, high low temperature cycle, power cycling test and finite element software simulation are used to study the failure and reliability of the power VDMOS device, which are important in improving the device quality.High temperature cycle, high low temperature cycle, power cycling test are used in the temperature cycling test in the four different kinds of the VDMOS devices. High-power semiconductor curve tracer is used in the measurement of electrical characteristics; electronic and optical microscope is used in the visual examination; unsealing, ultrasonic cleaning, microscopic analyses are used in the analyzing of the failure mode and mechanism. ANSYS finite element software simulation is used in building the three dimension mode of TO-220AB in power VDMOS device; then imitates the thermal stress and strain to study failure mode and mechanism. The phenomenon of fractures, cracks, scratches and overburnings may induce the degradation of the electrical characteristics. The mismatch of thermal expansion coefficient may produce the thermal stress in the juncture. The chemical reaction of the Al and the iron in water may lead the break of the leading bonds.High temperature cycle and the simulation of the ANSYS software demonstrate: the bonding layer sintering bad and cavity may cause cracking and bulge, which are indirectly leading the overburning of the device; the high stress and strain concentrated in the cavity, which induced the cracking and bulge and the chip fracture Power cycling test and the simulation of the ANSYS software demonstrate: the dismatch of the plastic encapsulated body and lead frame interface may lead the cracking and bonding wire fracture; the vapor in the plastic encapsulated body induced the"popcorn"phenomenon.In conclusion, the dismatch of the devices, the defects of the bond coat and the vapor may lead the failure of the device.
Keywords/Search Tags:VDMOS, Reliability, Failure, Electrical characteristics, Shell shape
PDF Full Text Request
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