Design Of RF CMOS Mixer For 3G Application

The explosive growth in wireless communications has driven universities and companies to produce wireless transceivers at low-cost, low-power. Recently, all of RF components, such as low-noise amplifier (LNA), mixer, phase-locked loops (PLL) , voltage-controlled oscillators (VCO), and power amplifiers (PA), are integrated into a single silicon die using CMOS technology.In this thesis, the theory and practice of down-conversion mixer for WCDMA application are centrally studied. Mixer is a key section in Radio Frequency (RF) system. Its behavior will directly impact on the performance of the whole system.Firstly, a down-conversion mixer has been designed based on WCDMA applications. The mixer has been simulated using 0.25-um CMOS technology of TSMC by RF emulator of Cadence. We have completed the matching of RF, LO and IF ports, and analyzed the simulation results of the mixer.Secondly, the layout of mixer has been drawn using Virtuoso Layout Editor of Cadence, and the drawing skills have been studied.Finally, besides the down-conversion mixer, we have designed LNA for WCDMA, and analyzed the relationship of performances, and achieved satisfactory result.The results manifest that the CMOS mixer and LNA have excellent performance as well as low-cost, low-power.