Optimization Design And Application Of Hardware Implementation Of Rijndael Ciper Algorithm

This project,based upon the research results of cryptography token generalization theory and method of the Insititute of Campus IC Card Standardization of Education Management Information Center in Ministry of Education, is mainly designed to solve the problem of optimization design of encryption chip,which is need when radio frequency card equivalent realization finance card standard .Rijndael algorithm will substitute for DES in the future several dozens years to take the mainstream of the symmetrical encryption algorithm and it represents the highest level in block cipher at present. The design for Rijndael algorithm hardware encryption chip and its utilization in the process of finacial trade have the important realistic value , simultaneously will have the important theory significance for us to design self-determination crypto-algorithm and chip in the future.On the basis of the analyzation of Rijndael algorithm, this article first argue about the feasibility of improving the decipher algorithm round transformation order and the mixcolumn transformation and then the significance of the hardware realization.Secondly ,in accordarnce with the previous transmutative algorithm,it proposed the concrete encryption/decryption hardware realization in the integrated circuit structure as well as four different transformations of round transformation, the control module, the key expansion and the input output modules optimized design method and each module realization electric circuit structure.Then uses the VHDL hardware description language to carry on the description to the system, take FPGA as the algorithm carrier, and carry on the simulation in MAX+plusII. Finally design the application model of this hardware encryption chip in radio frequency card equivalent realization finance card standard.