The Study And Design On Laser Wireless Communication And Error Code Detecting System Based On Ethernet

The project is mainly dealt with two parts. The first is to develop the laser communication circuit system based on fast Ethernet. Which is composed of the transform circuit for Ethernet medium, the drive circuit for laser modulation and receive circuit for laser demodulation. The second part is to develop a kind of practical error code detector, including signal generator based on m sequence, the circuit for bit synchronization and sequence synchronization.Under the task of the laser communication circuit design based on Ethernet, fully taking advantage of high rate linking technology of Ethernet, with the entire function integrated chip of IP113, there is to realize the encode from MLT-3 signal within twisted-pair 10/100M to 4B5B signal within optical link, provide with standard PECL level interface and self-adaptive 10/100M rate at TP port, taking on clock generating function and auto negotiation function, processing full duplex and semi duplex; with the characteristic of various LED combination display, it is possible to show many indications, such as failure, link, action, rate, full duplex and semi duplex. In modulation driving circuit, with the chip MAX3263, being the function of APC, there is standard PECL level interface to modulate laser modulation current and preset current neatly. In the receiving demodulation circuit, with the chip MAX3963 and MAX3964, there is high sensible circuit for front amplifier and back limited amplitude, also with the function of giving an alarm when no light. Through the experimental test on integration of modulation circuit and demodulation circuit, it indicates that there is high signal-to-noise ratio in the system.In the design for error code detector, with the Grand Scale Integration FPGA and the field programmable technology, under the real time control of the single chip machine, the whole system is efficiently fulfilled. In according to CCITT agreement, a kind of m sequence with special frame construction and period of 512 is generated. At the receiving end, the task of bit synchronization circuit is to extract clock from receiving data, and provide the clock for the m sequence module, so that detecting sequence synchronized with testing sequence. The sequence synchronization moduleis used to compare testing sequence with detecting sequence. After comparison, some error code will be found in the testing sequence crossing the channel, which is guidance to evaluate the performance of tested channel. After comparison, sequence module will send the overall number and error number of code to the single chip machine to process. The single chip machine is the control center for the whole system; it makes the whole system work normally with the respect of user's need.In the development of Ethernet and laser communication circuit, multimedia information on Ethernet is transmitted via laser wireless communication technology, regional restriction is break through, need of data communication is needed, and new application scope of laser communication is explored. In the design of error code detector, there are some disadvantages discarded, including no separation between transmitter and receiver, detecting single sequence, clock needed, large bulk and high cost. Some advantages are realized, such as independence transmitter and receiver, wide frequency scope, self-adaptively extracting clock, small bulk and low cost.