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Application Of High-Speed DSP Technology On Spatio-Temporal Spectral Estimation

Posted on:2002-05-24Degree:MasterType:Thesis
Country:ChinaCandidate:L ChenFull Text:PDF
GTID:2168360032953643Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
The method of high-resolution spatio-temporal spectral estimation (HRSTSE) is one of the advanced projects in the field of EW. But most of the achievements in this area are theoretical rather than practical due to the computational complexity of the algorithms and hardware limitation. Recently, however, owing to the great progress made in the process of IC manufacturing, high-speed digital signal processors are available for the hardware implementation of HRSTSE system. A wide-band array reconnaissance receiver based on HRSTSE technology are designed to perform frequency and 2D-DOA estimation of the impinged signals. Algorithm and system design are presented in the second chapter of this dissertation. The prototype system includes two parts: array receiver system and digital signal processing unit, where the array receiver system performs signal interception and ADC, while the digital signal processing unit accomplishes the unambiguous estimation of the frequency and azimuth and elevation angles of each signal. The main contribution of this dissertation lies in two aspects. Firstly, the design of the main processing board of the digital signal processing unit, and secondly the development of the system level software. The main processing board uses Ti's TMS320C6201 as digital signal processor, which communicate with the host CPU through PCI bus. The PCI bus irtLerface is implemented by the dedicated PCI bus controller 55920 and Altera's CPLD EPM7I28S. The system level software are composed of a main program and a virtual device drivers(VxD). The VxD provides the interface between the main program and the hardware and thus, harmonizes the operation of the hardware by cooperation with the main program. We have now finished the designing work and made some achievements during the system debugging. The main processing board functions correctly. However, due to the complexity of C6x DSP board design, moreover, there are hardly any experiences for reference, many of our designing work are innovative to solve the problems. Anyway, there are still a lot of work to do in order that the whole performance of the prototype system gets further improved. Even so, the design of the main processing board has established firm foundation for the implementation of high-performance DSP system, therefore, plays an important role in the application of HRSTSE.
Keywords/Search Tags:HRSTSE, DSP, CPLD, PCI bus, VxD
PDF Full Text Request
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