Research On The Breakdown Voltage Of SOI High Voltage MOS Devices

501 (Silicon on Insulator) technology is the ideal dielectric isolation for the SPIC (Smart Power IC), and would become the main technology of low power dissipation and high-speed integrated circuit in the next generation. So the development of SOI SPIC is receiving more attention in the world. SOT high voltage devices, the most important component in the SOI SPIC, whose characteristics will affect the development of SOI SPIC . The breakdown voltage of the 501 high voltage device is studied and the effects on the breakdown voltage are analyzed in this paper. Based on the analysis of the breakdown voltage and the electric field distribution of the conventional S0I high voltage device, the effects on the breakdown voltage are found. The buffer N4 layer 501 high voltage structure is studied in detail and the step doping buffer N4 layer SOI high voltage structure is proposed in this paper. The new structure overcomes the disadvantage of the uniform buffer N4 layer and resolves the problem of the vertical breakdown , high voltage could be received with the new step buffer N~ layer structure. The shield trench 501 structure is also studied in this paper. The novel structure resolves the vertical breakdown voltage problem of 501 high voltage devices well. The breakdown voltage versus the structure parameters are discussed by using the two dimension device simulation technology. The structure can shield the Si from the high electric field in the buried oxide and very high breakdown voltage could be obtained. The trade off process parameters was designed with the mixed process and device simulation, and the substrate material fabrication flow was developed and searched at the same time. The SOT high voltage structure proposed in this paper can overcome the problem of the breakdown voltage of SOT high voltage devices. Author hopes the work would be helpful to the research on SOT SPIC in the future.