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Analysis And Simulation Study Of VL Layer In AFDX End System Stack

Posted on:2012-12-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y T XuFull Text:PDF
GTID:2132330338484561Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
Avionics Full Duplex Switched Ethernet Network (AFDX) is the next generation avionics data bus standard. Explore and realize its application is of active significance to develop big airplane industry with Chinese inde- pendent intellectual property rights. The module of virtual link (VL) layer in AFDX end system stack discussed in this paper is to be applied to "Communication Platform for Flight Management System (FMS) Simu- lation based on AFDX". According to the background, designing and simulation of the module is researched through considering specifications of AFDX end system in ARINC664 Part 7, and the module is tested by using the architecture and application data of the Communication Platform based on ARINC429 and TCP/IP.Firstly, the function of VL layer is thoroughly analyzed and a synchr- onization scheduling policy based on static priority is proposed to achieve traffic regulation and scheduling of VL.Then the thesis focuses on the design and simulation of the module's FPGA programs by concretely describing the implement of transmitting and receiving modules respectively including submodules of buffer, sche- duler, redundancy management (RM) and integrity check (IC). In order to verify the whole module, the approach based on ARINC429 and TCP/IP to carry out and test the communication platform is introduced.Finally, the function verification of the module is performed. The results confirm that the study accomplishes functions of VL layer and meets the requirements of AFDX Protocol.
Keywords/Search Tags:AFDX, end system, protocol stack, virtual link, FPGA
PDF Full Text Request
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