| With the advancement of terahertz technology,the development of the terahertz frequency range has gradually emerged as a significant direction in various fields,including science and technology,socio-economics,and national security.Due to the applications in the terahertz frequency range,particularly the urgent demand posed by terahertz communication technology for ultra-high-speed data transmission,this frequency range has gained substantial attention internationally from the academic and industrial communities.It is considered a highly promising key candidate frequency range for the sixth generation of communication technology.The terahertz receiver,as a crucial component of terahertz communication systems,is responsible for receiving terahertz signals transmitted by the transmitter.It plays a pivotal role in tasks such as signal reception,amplification,demodulation,processing,and analysis.The terahertz low-noise amplifier,serving as the core module in the receiving chain,amplifies useful signals while suppressing the noise from subsequent components in the chain.The operational performance of this module directly impacts the sensitivity,communication distance,and signal transmission quality of the entire terahertz communication system.However,due to constraints imposed by existing manufacturing processes,as the operating frequency of silicon-based transistors approaches their maximum oscillation frequency,the parasitic effects of devices lead to a continuous degradation in active characteristics,intrinsic gain,and noise figure.This deterioration renders the devices incapable of meeting the requirements of communication systems.In the field of terahertz,traditional low-noise amplifier design approaches struggle to achieve optimal performance,posing significant challenges and difficulties in the design of terahertz low-noise amplifiers.Against this research backdrop,this dissertation takes addressing the challenges of inherent gain reduction and degradation in noise figure of transistors near their maximum oscillation frequency as its starting point.Focusing on the core technique of gain-noise collaborative optimization and incorporating broadband techniques,the study delves into an in-depth exploration of the gain-noise performance of active two-port networks,such as transistors,in the terahertz frequency range and ultimately achieves the best overall performance.The key research contents of this dissertation are summarized as follows:Firstly,this dissertation addresses the rapid degradation of intrinsic gain and noise performance in devices within the terahertz frequency range,presenting the theory of collaborative optimization of gain and noise for terahertz low-noise amplifiers.By introducing the representation of a two-port network,the dissertation characterizes key parameters such as unilateral power gain,maximum achievable power gain,stability factor,and nonreciprocity metric for active devices like transistors.Leveraging this network representation,the dissertation incorporates the gain-plane theory to achieve the theoretical maximum power gain in an embedded active two-port network.Simultaneously,by combining two-port noise theory and using embedding networks as a bridge,the dissertation establishes the relationship between gain state points and noise parameters.This leads to the proposal of a novel gain-noise plane theory,providing a theoretical foundation for the collaborative optimization of gain and noise.Building upon this theory,the dissertation critically reevaluates traditional techniques,classical theories,and common intuitions to refine the design approach for terahertz low-noise amplifiers.Secondly,based on the abovementioned gain-noise plane theory applied to low-noise amplifiers,this dissertation introduces design approaches for collaborative optimization of gain and noise for single-stage and multi-stage terahertz low-noise amplifiers.These approaches aim to achieve optimal gain-noise comprehensive performance,and their feasibility and effectiveness are validated through experiments.Guided by these design approaches,the dissertation explores various circuit topologies for terahertz low-noise amplifiers.Utilizing 65 nm CMOS technology and 130 nm Si Ge technology,multiple amplifier designs meeting gain requirements and featuring the lowest noise figure are realized,including a low-noise common-source amplifier with 24.77 d B gain at 130 GHz and a Cascode low-noise amplifier with 22.3 d B gain at 160 GHz.Experimental chip testing confirms the feasibility and effectiveness of these designs.Furthermore,building upon the gain-noise plane theory,this dissertation conducts theoretical research and design on the broadband optimization of terahertz low-noise amplifiers.In the terahertz frequency range,gain enhancement techniques often come at the cost of sacrificing bandwidth,causing a rapid decline in power gain away from the peak frequency.The dissertation analyzes and compares traditional broadband techniques and,based on the gain-noise plane theory,proposes a novel design approach for broadband terahertz low-noise amplifiers.This approach introduces high-order passive embedding networks,enabling active two-port networks to achieve the required gain state at multiple frequencies,thereby expanding the bandwidth.Using this proposed design approach,the dissertation completes the fabrication of a broadband high-power gain,low-noise amplifier operating at 133 GHz in the 65 nm CMOS technology,confirming its characteristics through chip testing.This successful design lays the foundation for constructing highspeed communication systems in the terahertz frequency range.Finally,based on the abovementioned gain-noise plane theory and its design approach,this dissertation accomplishes the design of the front-end chain of a terahertz receiver.The terahertz communication system garners attention due to its expansive frequency spectrum and higher security,especially in the realm of high-speed data transmission.Therefore,employing the 130 nm Si Ge technology and adopting PAM4 modulation,the dissertation designs the front-end chain of the terahertz receiver.Utilizing a duplexer in the front end of the chain to reduce the bandwidth requirements of terahertz active components,leveraging a low-noise amplifier with gain-noise collaborative optimization to enhance signal power and suppress noise interference,and introducing a mixer to achieve frequency conversion while conserving chip power consumption and area,the dissertation proposes a terahertz receiver front-end chain capable of transmitting data at a rate of at least 70 Gbps and the chip design has been successfully completed.In summary,this dissertation,based on the theory of two-port networks and noise,introduces the gain-plane theory and the novel gain-noise plane theory to achieve collaborative optimization of gain and noise for terahertz low-noise amplifiers.Building upon this foundation and incorporating broadband techniques,the key technology research on low-noise amplifiers applied to the terahertz receiver has been accomplished,and validation was achieved through the construction of the terahertz receiver front-end circuit. |
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