Research On Nonplanar Structure And Ultra-Low Power Transistors Based On Two-Dimensional Semiconductor Materials

In more than half a century of IC industry development,the continuous miniaturization of transistor feature size has not only inc reased the integration density of transistors,but also improved the overall performance of devices and final chips.However,after the characteristic length of transistors entered the nanometer size,the short-channel effect and quantum effect led to the increase of leakage current,threshold voltage drop and subthreshold slope recession,causing the increase of energy consumption in integrated circuits（ICs）.The fundamental reasons are:1.The miniaturization of channel length not only improves transistor overall performance continuously,and also reduces the Supply Voltage(V_DD)and Threshold Voltage(V_TH)of the transistors,but transistor must maintain a high driving factor(V_DD-V_TH)to further improve its operating frequency;2.The Boltzmann distribution of carrier energy states in the source/drain limits the subthreshold slope to larger than 60m V/decade.Therefore,the International Roadmap for Devices and Systems（IRDS）proposes two complementary approaches to reduce device power consumption in 2020:one is to introduce new high-performance materials,such as:germanium,carbon nanotubes,two-dimensional（2D）semiconductor materials,and III-V composite semiconductor materials,these novel high-performance materials have higher intrinsic carrier mobilities and faster top-of-the-barrier injection velocities than silicon-based channel materials,enabling devices to obtain higher operating frequency and output current at low supply voltages.the other is the introduction of new mechanism devices,such as tunneling transistors,Dirac source transistors,negative capacitance transistors,and memristor gate transistors,which obtain steep subthreshold slopes by varying their body factor or thermal factor.The gate can effectively control channel body when the channel thickness is less than one-third of the channel length after feature size enters atomic size.It becomes increasingly difficult for three-dimensional（3D）materials to grow high-quality films with thickness less than 5 nm,surface continuity and uniform thickness due to surface hanging bonds,lattice mismatch.Moreover,dangling bonds,rough surface and variation thickness cause carrier mobility declines wi th the sixth power of thickness.2D materials with atomic thickness and no dangling bonds can overcome the disadvantages of 3D materials and maintain high mobility,which is ideal for replacing silicon-based materials.In this thesis,2D materials are used as channel materials,non-planar gate structure devices and novel mechanisms devices are designed and prepared to obtain ultra-low subthreshold slopes and high current.Meanwhile,basic logic devices are constructed to explore their applications in high-current and low-power logic circuits.The main research contents and innovations of this thesis are as follows.1.Top-gate Mo S₂ transistors with a nonplanar quasi-Ωgate structure has been constructed for the first time using Ga₂O₃@Al₂O₃ nanowire as a template by the van der Waal heterogeneous integration technique,and its fundamental electrical properties have been systematically investigat ed.The nonplanar structured gate can enhance the local electric field of the channel body through the local electric field coupling effect,thus improving the gate control capability of the nonplanar gate.As a result,the nonplanarΩ-gate Mo S₂ transistor achieves a high current density of 890μA/μm and a high transconductance of 32.7μS/μm.Based on these excellent electrical properties,the basic logic circuits（NOT gate and NOT-AND gate circuits）were constructed on a single Mo S₂ sheet,and the inverter achieve the ideal noise tolerance（89%）and high voltage gain（26.6）.This work provides a new idea for the development of high-current,low-power logic devices.2.The resistive gate structure consists of a silver（Ag）/black phosphorus oxide（PO_X）/black phosphorus（BP）/gold（Au）,and the conductive filament that is composed of oxygen vacancies in the PO_X can induce sudden change of resistance state of the resistive gate structure.The resistive gate structure was integrated on the top gate of Mo S₂ device,and the abrupt transition of its resistance state causes a nonlinear change of the gate capacitance of Mo S₂ transistor,which leads to an steep-slope transition of output current,obtaining an ultra-steep subthreshold slope（SS<1.0 m V/decade）.The resistive gate devices break the limit of Boltzmann distribution and exhibit good repeatability and stability.Simple logic circuits based on the resistive gate devices achieve ultra-high voltage gain～2000 and～2000 n W level of power consumption.Therefore,memristor gate devices provide a new idea for the study of low-power transistors.3.Hot-electron tunneling transistors which are constructed by heterogeneous integration of 2D materials（Mo S₂/Hf O_X/Hf S₂/Hf O_X/Ge Se）from bottom to top has obtained ultra-high current gain of 24104 and collection efficiency close to the limit.These excellent performances can be attributed to three reasons:1.the atomically flat Hf O₂ layers grown by mild oxidization of Hf S₂,which improves the interface quality of the two demensional heterojunction;2.momentum difference is large when hot electrons pass through 2D/3D interface from 2D to 3D,2D/2D heterojunctions can minimize momentum mismatch;3.the rational energy band design allow for higher injection energy of hot electrons.This work provides a new idea for the research of high-gain and low-power amplifiers.