Design And Applications Of Arithmetic Units Based On Stochastic Number Correlation

Moore’s law has guided the development of integrated circuit technology for more than half a century.Today,billions of transistors can be integrated on a circuit chip of hundreds of square millimeters.With the continuous improvement of the integration of digital chips and the continuous reduction of device feature sizes,integrated circuit technology is facing challenges from materials,technologies,devices,systems and physical limits of basic physical laws.As a new computing paradigm,SC expresses numerical values in the form of probability,can further improve the computing potential and system performance of existing devices based on its self high fault tolerance,low complexity and low power consumption.Arithmetic operation is the basis for realizing various complex operations,so high-performance arithmetic operation unit is the cornerstone for SC to realize various applications.At present,the arithmetic operation units in SC,such as adders and dividers,still have problems such as low accuracy,high hardware overhead and limited use range.Based on stochastic number correlation,aiming at these problems,this thesis designs the arithmetic operation unit in SC,the innovative research contents of this thesis are summarized as follows:(1)For the mean circuit,the input stochastic numbers with the maximal correlation are obtained by sharing the RNS.Based on the stochastic number correlation,the mean circuit NCMC and PCMC with low hardware overhead and high output accuracy are designed,which effectively alleviates the problems of high hardware overhead and low output accuracy in the existing stochastic mean circuit design.Further,in order to promote the use range of NCMC and PCMC,a general mean circuit architecture GMC is designed,which realizes the function of computing the mean of arbitrary number of values,and its performance advantage becomes more obvious with the increase of the number of input values.The experimental results show that the proposed circuits have approximately 50%,59%,61%,and 64% reduction in area,compared to the MUX-based designs.Meanwhile,NCMC,PCMC and GMC have better output accuracy and hardware cost in the application of image edge detection and mean filtering algorithms,which shows their important value in the field of image processing.(2)For the weighted adder circuit,based on its characteristics as a general extension of the mean operation,a weighted adder circuit that can compute arbitrary number of inputs and arbitrary weights based on sharing one RNS is designed by using stochastic number correlation.The limitation that the coefficient sum must be fixed as 1 in the current stochastic weighted adder circuit is solved.When Gaussian smoothing algorithm and complex polynomial computation are used as application cases,the experimental results show that,the Gaussian smoothing circuit and polynomial computation circuit implemented based on the weighted adder designed in this thesis have achieved significant improvement in calculation accuracy and provided lower hardware overhead compared with the existing SC structure.For example,the 5thorder Maclaurin polynomial of the sigmoid(x)can have at least an 87% improvement in accuracy and a 21% reduction in area.(3)For the division circuit,JK flip-flop is taken as the design core,and the stochastic numbers with the maximal correlation are generated by sharing one RNS as the input.A high-precision stochastic division circuit is designed by using correlation logic,which solves the limitation of distinguishing divisor and dividend in advance in the previous design.For the stochastic square root circuit,four high-performance circuits are successfully realized by combining the basic units of SC,and the effect of injection delay method on its performance is studied.Finally,according to the characteristics of division and square root operation,image contrast stretching algorithm and gamma correction algorithm are used to further verify the circuit performance designed in this thesis.