Research On Precise Clock Synchronization And Distributed Trigger Techniques For CSNS

China Spallation Neutron Source(CSNS)is a complex system consisting of particle accelerators,a target station,and neutron spectrometers.It has a wide range of equipment and a wide range of distribution.The cooperative operation between devices requires precise synchronization control.High-precision clock synchronization and distributed trigger technology are the basis of the stable operation of CSNS and the key to high precision and high-quality reading of scientific neutron spectrometer data.At present,to meet the differentiated needs of different devices,the clock synchronization and triggering of each device in CSNS are realized based on various methods.The clock synchronization and triggering system of CSNS lead to problems such as complex clock networks,demanding upgrades,and lack of uniform time stamps.The existing clock synchronization and triggering technologies used in accelerators cannot simultaneously meet the requirements of high synchronization performance,high phase stability,low data transmission delay,and scalability of CSNS.The analog distribution technique has high phase stability but cannot transmit complex data and time.Event timing technology has low data transmission delay,but its phase stability and synchronization accuracy are insufficient.Moreover,it can only transmit event codes in one direction.White Rabbit technology provides high synchronization performance and flexible data transmission but still suffers from bottlenecks of phase stability and multi-stage cascade synchronization accuracy.It also has high data transmission latency.Therefore,in this paper,facing the challenges of high synchronization accuracy and phase stability in addition to low transmission delay,the precise clock synchronization and distributed trigger technology for CSNS based on the high-speed serial fiber link focuses on clock synchronization,phase stability optimization,low delay transmission,and system extensibility to guarantee the accuracy and precision of the cooperative operation of accelerator complexes.A prototype verification system is developed,and test experiments are carried out.In order to obtain high phase stability and precision performance of the clock system synchronization,a high-precision clock phase synchronization method based on high real-time phase feedback compensation is proposed.By analyzing the influence factors of synchronization accuracy and phase stability in high-speed serial fiber links,this paper proposes an optical fiber transmission scheme based on single wavelength dual-core fiber and a clock phase control scheme of serial transceiver based on high precision phase measurement and clock interpolation technology in programmable logic devices.Under the condition of system reset and fiber temperature variation,the phase stability of the synchronous clock is better than 0.6°@156.25 MHz,and the synchronization accuracy of the four-stage cascade is improved to 7.2 ps.Aiming at the problem of low transmission delay of critical data,this paper proposes a clock synchronization and trigger network low delay transmission technology based on data frame routing optimization and priority control.This paper proposes a data routing scheme and frame priority control scheme based on dynamic node address allocation by analyzing the key factors affecting the hardware transmission delay.This paper designs a dynamic node address allocation algorithm based on the routing mechanism of the bus interconnection module on the chip of programmable logic devices.The node address is determined by the node’s position in the network.The address parameters map directly with the routing path,thus eliminating the network route query process on the traditional WR switch and reducing the routing delay of data frames.Furthermore,an efficient transmission protocol with frame priority control is designed at the link layer,and a particular cache space is designed for keyframes.The low hardware transmission delay of the highest priority data frame is less than 1.5μs under the four-level cascade.Furthermore,this paper designs a prototype verification system and builds a synchronization experimental verification platform to test and verify the key performance and functions.The test results show that the synchronization phase stability of the prototype system is less than 0.6°@156.25 MHz,the hardware transmission delay of the highest priority data frame is less than 1.5 μs,the synchronization accuracy is better than 10 ps,and the synchronization accuracy is better than 1 ns,which meets the application requirements of CSNS and preserves a certain performance margin.It can also provide a reference scheme for related acceleratorbased big scientific complexes and distributed data acquisition systems.