Research On Key Technologies In On-Chip Microwave And Millimeter-Wave High-Resolution Phased Array

With the ever-increasing demand for 5G communication and high-precision detection radar,silicon-based phased-array systems with high rate transmission,high energy efficiency,high integration and low cost play a critical role on high rate wireless transmission system.However,with the increasing of operational frequency,the design of on-chip phased-array system and its key circuits is still a great challenge.In this dissertation,many architectures and technologies on high-precision digital phase shifters and phased-array systems are proposed.In addition,a series of digital phase shifters and phased-array transmitters with state-of-the-art performances are implemented based on nano-scale CMOS technology.The main contributions and innovations of this dissertation are summarized and concluded in the following aspects:1.8-bit high-precision digital phase shifter.Aiming at the challenge of microwave high-precision phase shifting,a variable-gain amplifier based on digital-controlled MOS array is proposed.The high-precision amplitude modulation for quadrature vectors is achieved by introducing a Gilbert-type amplifier with current source arrays,whose ratio of width and length satisfy geometric distribution.Then,the phase shifting resolution can be improved without increasing the circuit complexity.Based on the mechanism mentioned above,a high-precision phase shifter supporting 8-bit phase shifting resolution is designed in 28nm CMOS technology.The operational frequency of the proposed phase shifter is from 18 to 24GHz.Meanwhile,the RMS phase and amplitude errors are less than 0.46° and 0.59dB,respectively.2.W-band 9-bit high-precision digital phase shifter.To decrease the influence of parasitism on the amplitude and phase balance for millimeter-wave quadrature signals,a compensation technology for quadrature signal generator based on L-C-R quadrature all-pass filter is proposed.Inductances and transmission lines are cascaded at four output ports of the quadrature all-pass filter to offset the parasitic from next stage.Then,the amplitude and phase errors of quadrature signals are reduced.Based on the mechanism mentioned above,a 90-98GHz 9-bit compact digital phase shifter is implemented in 40nm CMOS process.The phase and amplitude errors are less than0.71° and 1.23dB,respectively.3.Digital phase shifter with on-chip phase self-calibration technology.To improve the linearity between output phase and control code,an on-chip phase self-calibration technology is proposed.The phase control code of the vector-sum digital phase shifter is automatically generated by vo ltage detection and comparison at key nodes.Then,the on-chip phase self-calibration is achieved.Based on 28nm CMOS process,a digital phase shifter with on-chip self-calibration technology is implemented.The proposed digital phase shifter supports 7-bit effective phase resolution.The operational bandwidth is from 22 to 44GHz,which meets the 5G millimeter-wave standard in various countries.By the on-chip phase self-calibration technology,the RMS phase and amplitude error are less than 1.02° and 0.59 dB,respectively.4.W-band transmitter channel with gain compensation technology.To decrease the amplitude error of transmitter channel introduced by digital phase shifter,a gain compensation technology is proposed.By introducing a variable-gain power amplifier after digital phase shifter,the output amplitude of phase shifter can be compensated at different phase shifting states separately.Then,the whole amplitude error of the transmitter channel can be reduced.Based on the mechanism mentioned above,a 90-98GHz transmission channel with 9-bit phase shifting resolution and 6-bit variable gain resolution is implemented in 40nm CMOS process.The small-signal gain of the transmitter channel is from 16.6 to 18dB and the gain variation range is 1.4dB.5.W-band phased-array transmitter with gain compensation technology.Based on the W-band 9-bit high-precision digital phase shifter,6-bit variable-gain power amplifier,and an on-chip one-by-four Wilkinson power divider,a phased-array transmitter architecture with gain compensation technology is proposed.Based on 40nm CMOS process,a W-band phased-array transmitter with gain compensation technology is implemented.The implemented phased-array transmitter features a saturation output power of 5.03 to 8.13dBm,less than 1.12dB RMS amplitude error,and less than 1.82°RMS phase error.An amplitude error improvement of 9.1% is achieved by the gain compensation technology at 94GHz.