Research On Rapid Modeling And Simulation Methods In Integrated Circuit Design And Manufacture

The invention of the first integrated chip in the middle of last century indicates a revolutionary era in the electronic communicating device world, and creates an unprecedented penetrating and powerful emerging Integrated Circuits(IC) industry. The IC industry paves its own way in the rapid development according to Moore's Law during the last half century. The continuously shrinking feature size of technology and highly integration pushes the design methodology of the integrated circuits to update itself with the development. The design methodology of the integrated circuits starts with the focusing on device designing, later evolves to the interconnect-centric designing, and finally reaches to the DFM and yield driven design methodology.As a kind of important design tool, modeling and simulation are implemented through the whole design flow. Especially, with the continuously shrinking feature size and the high integration, modeling and simulation not only reduce the designing cycle, but also save the extra cost of research and manufacturing, are widely used in IC designs.In this dissertation, two problems are mainly discussed and studied. One is the rigorous simulation of photo mask caused by the shrinking feature size of the technology node, and the other is the model order reduction (MOR) of the nonlinear circuit system caused by the high integration of the IC systems.In the first part of the dissertation, a parallelized generalized eigen-oscillation spectral element method is proposed to deal with the rigorous simulation of the photo masks. In this method, the profile of the photo mask is firstly partitioned vertically into a limited number of specialized vertical sections, and only the eigen functions and special solution in each of these specialized vertical sections are needed to represent all the electric field distribution in any of the vertical sections, as a result, the computation time is greatly reduced. Secondly, by employing the Discontinuous Galerkin method to solve the eigenvalue problem and special solution problem, this method avoids the computation and error introduced by Fourier extension, thus the high accuracy is guaranteed. Thirdly, the highly parallel implementation can be used in the Schwarz iteration on the interface matching in adjacent sections. The high parallelizability of the GeSEM makes it an efficient method to simulate large-scale masks. The application of the proposed method improves the lithography resolution by both the optimization of the phase shift mask and layout optimization, which reduce the design cycle and save the research cost.In the second part of the dissertation, a wavelet-collocation-based trajectory piecewise-linear algorithm is proposed to deal with the model order reduction problem of nonlinear circuits in time domain. Firstly, the proposed method performs the model order reduction directly in time domain and avoids the additional error introduced by the transform from frequency domain back to time domain in traditional methods. Secondly, by virtue of the wavelet multi-resolution and adaptive property, the reduced model maintains a higher accuracy. Finally, the wavelet companding technique makes the proposed method achieves much higher accuracy in the time domain, which makes it much more efficient in high level simulation.A complete set of numerical examples demonstrate the validity and effectiveness of the proposed method in this dissertation.