| The rapid advance of standard digital CMOS process technology and circuit design methodology has enabled complex electronic systems to be integrated in single chips (System On Chip). Most of the SOC chips contain both digital processing units and dedicated analog interface components. One of the most challenging issues in the design of mixed-signal chip is the simulation and verification of the analog circuits. Conventional transistor-level simulators, such as SPICE, cannot afford the huge amount of computation overhead involved in the simulation of large-scale analog/mixed-signal systems. Therefore advanced analog behavioral modeling and simulation techniques have become urgently needed. Recently, Switched-current (SI) technique is considered as a promising technique for the monolithic implementation of mixed analog and digital VLSI. In contrast to the conventional switched-capacitor circuits, SI technique has many advantages, such as the compatibility with standard digital CMOS processing technology and the capability of working with low supply voltage. In this thesis, we aim to solve several of the key issues involved in the behavioral modeling of switched-current circuits. Especially we exploit the new modeling methodologies to fasten the behavioral simulation in the bottom-up verification of mixed-signal system. Both the small signal and large signal behavioral, as well as the time domain and frequency domain behavior of the switched-current circuits have been studied and modeled in the proposed physical model by theoretical derivation. Moreover new behavioral modeling methodologies based on wavelet methods have been proposed to automatically generate behavioral models. The main contributions of this dissertation are presented as follows:1. High-order nonlinear physical models have been derived to capture various non-ideal behaviors of the switched-current building block circuits, such as charge injection errors, mismatch errors and finite output input conductance errors. Furthermore, the ideal behavior and non-ideal behavior of switched-current circuits are modeled in a unified formulation, which eases the representation of models. The proposed model can speed up the time-domain simulation of switched current system by 3 to 4 orders and within 1% simulation error compared with SPICE. 2. In conventional modeling method, the frequency behavioral of SI circuits is obtained by large amount of time domain behavioral simulations of the circuits, which consumes unbearable CPU time. Moreover large signal frequency behavioral model has not been thoroughly studied in the conventional research. In this thesis, the frequency domain behavioral models are proposed for SI circuits such that frequency domain behaviors can be directly calculated by frequency domain behavioral simulation. The proposed model can also capture both large signal and small signal effects of the switched-current building blocks in frequency domain. To obtain the frequency-domain characteristics of each building block in small signal range, a linear model containing the various errors in SI circuits is proposed to perform z-domain transformation directly from its explicit time-domain behavioral expression. The frequency behavioral under large signal range is also specifically modeled. The accuracy of the proposed models is verified by comparison with SPICE simulation results. 3. A wavelet collocation method with nonlinear auto-companding for behavioral modeling of SI circuits is proposed. The companding function can be constructed automatically according to the initial error distribution obtained by conventional wavelet expansion. Compared with modeling method in [Lixin01], the proposed algorithm is an automatic behavioral model generation algorithm, which can be used as a general-purpose approach to model the building blocks of SI circuits. More importantly, the proposed auto-companding approach can efficiently control the error distribution and reduce the modeling errors. 4. By combining the auto-companding method with...
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