| From Main Street to Wall Street, everyone has felt the effects caused by the Internet revolution. The Internet has created a new economy in the New Information Age and has brought significant changes in both business and personal life. This revolution has placed strong demands for higher bandwidth and higher computing speed due to high data traffic on today's information highway. In order to alleviate this problem, growing interconnection bottlenecks in digital designs have to be solved.; The most feasible and practical way is to replace the conventional electrical interconnect with an optical interconnect. Since silicon does not have the optical properties necessary to accommodate these optical interconnect requirements, III-V based devices, most of which are GaAs-based or InP-based, must be intimately interconnected with the Si circuit at chip level. This monolithic integration technology enables the development of both intrachip and interchip optical connectors to take advantage of the enormous bandwidth provided by both high-performance very-large-scale integrated (VLSI) circuits and allied fiber and free-space optical technologies. However, lattice mismatch and thermal expansion mismatches between III-V materials and Si create enormous challenges for developing a feasible technology to tackle this problem. Among all the available approaches today, wafer bonding distinguishes itself as the most promising technology for integration due to its ability to overcome the constraints of both lattice constant mismatch and thermal expansion coefficient differences and even strain due to the crystal orientation.; We present our development of wafer bonding technology for integrating III-V with Si in my dissertation. First, the pick-and-place multiple-wafer bonding technology was introduced. Then we systematically studied the wafer bonding of GaAs and InP with Si. Both high temperature wafer fusion and low/room temperature (LT/RT) wafer bonding have been investigated for different applications. We also systematically studied the electrical properties of bonding interfaces for high temperature wafer fusion of GaAs/Si and InP/Si. Room temperature and low temperature wafer bonding technology has been invented primarily for bonding GaAs with Si due to larger thermal expansion coefficient mismatches. Finally, we showed the feasibility and practicality of our wafer bonding technologies by fabricating high performance devices. A high performance InP-based avalanche photodetector on Si was fabricated utilizing the high temperature wafer fusion of InP and Si. And a 0.85 μm GaAs-based vertical cavity surface emitting lasers (VCSELs) were fabricated by utilizing the low temperature wafer bonding of GaAs and Si. |
