Characterization measurement, circuit modeling and numerical simulation of a high electron mobility transistor

An extended voltage range circuit model for the pHEMT is developed using characterization data obtained by an improved stability test method and extraction procedure. The improved stability test method requires minor modification of bias tees and inverted mode operation. pHEMT characterization revealed two oscillation modes for forward gate bias, both of which were eliminated by the new measurement procedure.; A new de-embedding and extraction procedure for the stabilized inverted mode operation is developed. A new voltage dependent parameter small signal model for negative conductance and accompanying extraction procedure is developed for the measured negative conductance characteristics.; It is demonstrated that a one-dimensional pHEMT model based on saturated electron velocity and the two dimensional electron gas density function models square law and linear behavior at gate voltages just above threshold. A pHEMT two-dimensional Poisson solution for pinch off conditions is developed and indicates the presence of a high E field at the drain edge of the gate. Limited Monte Carlo data is presented to show that the high E field is capable of generating a low velocity X energy band electron population.; The one-dimensional model is developed further as a new drain current equation for the MNS user definable GaAs MESFET model. A single energy reference level adequately models measured drain current characteristics above threshold. The function is further modified to include the lower transconductance and negative conductance of positive gate voltage operation. A new gate charge model is also developed for the MNS simulator model.; New numerical simulation results for quantum and physical parameter variation effects of the pHEMT are presented. It is shown that capacitance extracted from a new regional mobility numerical simulation model and only that model, emulates measured gate source capacitance. Lastly it is shown that simulation of the characterized pHEMT indicates that the buffer layer and not the gate width determines the drain barrier lowering characteristics for that pHEMT.