Pragmatic and reliable device/circuit simulation for design in advanced silicon-based technologies

This dissertation describes pragmatic application-specific mixed-mode device/circuit simulation approaches for design in contemporary Si-based technologies. First, a methodology for improving the efficiency of conventional numerical device simulation is proposed, where a new simplified energy-balance (SEB) model is developed and implemented in FLOODS as a pragmatic option. In the SEB model, the energy-relaxation length is estimated from a pre-process drift-diffusion simulation using the carrier-velocity distribution predicted throughout the device domain, and is used without change in a subsequent simpler hydrodynamic (SHD) simulation. The new SEB model is verified by comparison of two-dimensional SHD and full-HD DC simulations of submicron bulk-Si and SOI MOSFETs. The most noteworthy feature of the new SEB/SHD model is its computational efficiency, which results from reduced Newton iteration counts due to the enhanced linearity. Next, a semi-numerical approach is considered for mixed-mode device/circuit simulation where physical compact models are developed based on device structures. The approach is first applied to advanced SiGe-base HBTs through MMSPICE to investigate their temperature dependences. MMSPICE-simulated and measured DC and AC characteristics are shown to be in good agreement for SiGe HBTs, over a wide temperature range, thus proving the practical utility of the semi-numerical approach. The approach is next applied to submicron fully depleted (FD) and non-fully depleted (NFD) SOI MOSFETs via SOISPICE to analyze floating-body effects on circuit performance. New continuous charge models for scaled devices, having continuous derivatives in all regions of operation as well, are presented. The floating-body effects are physically accounted for in the models and unified for DC, AC, and transient simulations. Several applications of SOISPICE are described to exemplify unique SOI circuit behavior due to floating-body effects and to show how it necessitates physical models for reliable circuit simulation and design. FD/SOI DRAM design is first examined as an alternative to avoid possible failure mechanisms of NFD/SOI DRAM, such as transient leakage currents in the memory cell and data instability in the sense amplifier. In another circuit application, a simulation-based design of a 10-bit current-steering digital-to-analog converter (DAC) is described to demonstrate a novel approach to ensure kink-free operation of floating-body NFD/SOI analog circuits.