Oxide reliability improvement through nitridation technology in VLSI CMOS and nonvolatile memory devices

Gate oxide and tunneling oxide used in CMOS and Non-Volatile Memories (NVM) are of significant importance in modern day and future Very-Large-Scale-Integrated (VLSI) devices. As devices are continuously being scaled down to the deep sub-micron regime to achieve higher circuit density and better performance, oxide reliability becomes a limiting factor for device scaling. Boron penetration in dual gate CMOS process also poses a serious limit on future device scaling. Nitridation technology is investigated as a novel method to improve the oxide reliability for both CMOS and non-volatile memory devices. Elimination of boron penetration in p+ doped PMOSFETs is also achieved by nitrogen incorporation in gate oxide. Present understanding of gate oxide reliability issues and device characteristics under different stress conditions are discussed. N₂O annealed oxides and post polysilicon gate nitridation techniques are investigated as viable methods to significantly improve device reliability. The feasibility of the nitridation technology is supported by both experimental data and theoretical analysis.