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Surface activation enhanced low temperature silicon wafer bonding

Posted on:2001-03-13Degree:Ph.DType:Dissertation
University:Duke UniversityCandidate:Gan, QingFull Text:PDF
GTID:1468390014453062Subject:Engineering
Abstract/Summary:
Direct wafer bonding technology has received great attention since 1985. It enables to realize the novel combinations of different materials for expanded functionality and provides a versatile device technology for transferring device layers to another wafer for further processing or device integration onto one wafer. Silicon direct wafer bonding has found a wide range of applications including Silicon-on-Insulator (SOI) wafers, micromechanical devices, and sensors and actuators. One of the challenges facing this technology is to achieve strong bonding at low temperatures that can survive post-wafer bonding processing. This dissertation presents the results of developing new wafer bonding processes for achieving high bonding energy at low temperatures.; For thermal oxide covered silicon wafer bonding, dilute HF solution has been used to etch the wafers prior to room temperature bonding. The bonding energy has been significantly enhanced which reached silicon fracture energy after annealed at 100°C for 45 hours. For native oxide covered silicon wafers, the pre-treatment in dilute HNO3 and dilute HF mixtures has been found to be able to enhance the bonding energy at low temperatures. This is attributed to the incorporation of fluorine in native oxide during the pre-treatment. Various approaches have also been explored for hydrophobic silicon wafer bonding. Both boron doped surface layers and the amorphous surface layers have demonstrated an ability to significantly enhance the bonding energy at low temperatures, with silicon fracture energy achieved at 300–400°C for hydrophobically bonded pairs.; The thermal management of heterojunction bipolar transistor (HBT) circuits fabricated by Symmetric Intrinsic HBT (SIHBT) processing was also studied in this research project using simulation method. Design criteria of selecting the surrogate substrates, interconnection dimension, and dielectric materials for the optimization of thermal management have been obtained.
Keywords/Search Tags:Bonding, Low, Surface
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