Performance optimization of mixed time systems using self-timed logic

With growing circuit complexity and shrinking process technology, interconnect delays become dominant over gate delays. This poses a serious challenge for chip level communications between blocks due to long interconnect delays. Moreover, to achieve faster design time, more and more blocks designed by third party vendors are used or previously designed blocks are reused. We envision such a heterogeneous system to be comprised of independent synchronous blocks (synchronous blocks with independent clock frequency or phase) and asynchronous blocks. In this dissertation, we present schemes for performance optimization of heterogeneous or mix time systems using self-timed logic.; For synchronous blocks, we focus on optimal clocking for high-performance self-resetting domino pipelines. We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing “time borrowing.” i.e., allowing input signals to arrive at a pipestage after the clock tick. We show a robust way of placing “roadblocks” (equivalent to slave latches) in each pipestage to maintain the optimal clock rate. As explicit latches are not required at the pipe stage boundaries, the latch overhead is eliminated. We use the self-resetting scheme to circumvent often performance-limiting precharge timing requirements.; For asynchronous blocks, we discuss design of an asynchronous adder as adders are one of the most important datapath elements. We describe methods of hiding control overheads and reducing completion sensing overhead. We implemented a dynamic self-timed Carry Bypass Adder which runs 36% faster than comparable synchronous designs.; We also present an interfacing scheme for synchronous and asynchronous blocks. We describe a novel synchronization scheme called “Pausible Clocking Control” which is guaranteed to be free of synchronization failures amongst multiple synchronous and asynchronous blocks operating independently.