| Integrated circuit fabrication techniques rely on optical microlithography, an optical technique that has been used to transfer the patterns from the photomask to the silicon wafer since shortly after the invention of the integrated circuit (IC) in 1958. More than four decades later, optical lithography is still the key enabler and driver for the semiconductor industry and continues to be the desired mainstream approach because of its cost effectiveness, even though lithography represents over thirty-five percent of the chip manufacturing cost.;However, the International Technology Roadmap for Semiconductors (ITRS) has warned that the photomask industry is falling behind the requirements of the chipmakers, especially in the areas of process control and metrology. Development of photomask process metrology infrastructure to achieve critical dimension (CD) control is essential to support the technical and manufacturing needs of optical lithography below 100 nm.;This dissertation describes a fast, reliable, and low cost non-contact metrology technique developed as an alternative to existing CD measurement equipment such as scanning electron microscopy (SEM), atomic force microscopy (AFM) or optical microscopy. The metrology sensor is based on a measurement of capacitance, which is a linear function of the CD. Thus, by using a calibration algorithm, the capacitance measurement can be automatically converted into a linewidth value.;The metrology sensor has been fabricated using a Low Temperature Co-Fired Ceramic (LTCC) technology, which allows for a reduction of parasitic capacitances while minimizing fabrication costs. Because particle contamination is a critical concern, the metrology sensor and the chrome photomasks are never in contact. Capacitance measurements are performed at room temperature in order to minimize steps during the inspection phase.;Finally, this dissertation describes test structures printed on photomasks and the CDs extracted when using this metrology technique. |
