| As device dimensions continue to scale down into the sub-100 nm CMOS (Complimentary Metal-Oxide-Semiconductor) regime, enormous challenges with respect to formation of advanced junctions and contacts are encountered. These challenges come in the form of the need for ultra-shallow extension junctions (<20 nm) with very low sheet resistances (<400 Ω/sq.), with near-perfect, laterally abrupt profiles (<2 nm/decade) and process compatibility with respect to ultra-low resistivity metal (silicide) contact formation. In this work, a novel junction formation method was developed to address the above-mentioned problems simultaneously. In order to achieve above-equilibrium activation at low temperatures, a diffusion-free junction process based on in-situ activated Silicon-Germanium-Boron ternary alloy as-deposited junctions was proposed as potential solutions for end-of-the-roadmap ultra-shallow p +/n junctions. These films were grown at 500°C by Ultra-High Vacuum Rapid Thermal Chemical Vapor Deposition (UHV-RTCVD).; In order to achieve above-equilibrium stable dopant activation, a novel idea that allowed for the substitutional incorporation of very high levels of boron in a strained SiGe lattice was employed. The reverse junction leakage of the as-deposited and annealed junctions satisfied a stringent budget of 1% of the device off-state leakage for both, the high performance and low power designs. Temperature dependent leakage current measurements indicated a generation-dominated current for temperatures in the range of device operation (@ VR = −1 V, 25–100°C) and band-to-band tunneling only at high biases (>4 V).; The nominal slope of the junction doping profile decay from SIMS was estimated to be less than 4 nm/decade. Subsequent improvements in determining the actual junction abruptness by reducing the SIMS primary beam energy were incremental owing to nonelimination of other artifacts. To overcome these limitations, the junction abruptness was quantified using the reverse-bias C-V extraction method.; Considering the junction alternatives for the sub-70 nm technology nodes and the thermal compatibility requirements with advanced gate stacks that employ high-k dielectrics and/or metal gates, the as-deposited SiGeB junction and contact technology finds great promise with respect to its potential applicability. (Abstract shortened by UMI.)... |
