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Technology and cost modeling of hydrogenated amorphous silicon and low-temperature poly-silicon thin film transistor liquid crystal display manufacturing

Posted on:2003-09-06Degree:Ph.DType:Dissertation
University:Stanford UniversityCandidate:Jurichich, StevenFull Text:PDF
GTID:1468390011481864Subject:Engineering
Abstract/Summary:
Amorphous-Silicon Thin-Film Transistor Liquid Crystal Displays (a-Si TFT-LCDs) are finding large growth opportunities outside of portable notebooks in monitor, consumer, and wireless applications and are approaching a {dollar}20B market size. While a-Si LCD's meet the technical requirements for many current flat panel display applications, the manufacturing cost of a-Si TFT LCD's remains a major barrier to market growth and presents an opportunity for an alternative flat panel display technology.; In this work, we describe a new methodology for calculating the cost of TFT LCD manufacturing as function of plant capacity. The methodology allows us to separate the TFT LCD manufacturing cost into a component that is purely a function of the process flow and thereby readily allows for making cost comparisons between alternative display technologies independent of plant size and operating policy. We model the cost per display and the economies of scale for the first, second, and third Generations of a-Si TFT LCD manufacturing. We determine the impact of the evolution of process flow, equipment productivity, yield, and material costs on the cost of display manufacturing and economies of scale.; Low temperature poly-Silicon TFT (LT p-Si) is a promising TFT technology because it has carrier mobilities two orders of magnitude higher than of an a-Si TFTs thereby allowing for the monolithic fabrication of the driver circuitry and a reduction in the module component and assembly costs. Driver ICs represent a significant cost of a-Si TFT-LCD's and will remain so with the move toward higher resolution displays. It has been widely believed that LT p-Si would only be applied to the small displays (less than 6-in) because of the greater complexity of its TFT process and the less mature state of several LT p-Si processes. To model the cost of LT p-Si we consider several different process flows and develop a TFT array yield model that takes into account the additional process complexity and critical area of integrating the driver circuitry. We present results for the cost of manufacturing of LT p-Si LCDs compared to a-Si LCD for diagonal sizes from 2 to 21-in. and examine the impact of the trend toward higher resolutions on the manufacturing costs of these two technologies.
Keywords/Search Tags:Cost, Manufacturing, Display, TFT, LT p-si, A-si, Technology, Model
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