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Design for environment (DFE) in semiconductor manufacturing

Posted on:2004-01-29Degree:Ph.DType:Dissertation
University:University of California, BerkeleyCandidate:Krishnan, NikhilFull Text:PDF
GTID:1458390011453723Subject:Engineering
Abstract/Summary:
Design for Environment (DFE) is extremely challenging in semiconductor manufacturing, owing to short product and manufacturing process lifetimes, the complexity of the manufacturing process, stringent quality requirements, and diverse environmental impacts. With rapid growth in this sector, environmental impacts are increasingly a cause for concern. This dissertation develops an effective methodology and a tool to support DFE in semiconductor manufacturing, called the Environmental Value Systems (EnV-S) Analysis.; The EnV-S uses a “bottom-up” equipment-centric approach. A bottom-up approach offers the flexibility in analysis required in semiconductor manufacturing. Enough detail is available to directly inform the design of semiconductor equipment, make equipment selection decisions, process decisions, among others. A unit process model focus is developed and the system to be analyzed is defined by instancing and linking unit models together. A clear link between design and operational parameters and environmental impacts is established. Therefore, many different types of analyses can be performed, including relational analyses of environmental impacts to different model parameters, uncertainty analysis based on model parameters and the ability to support DFE by evaluating a large number of design options.; The EnV-S provides a framework to simultaneously assess a variety of different environmental metrics. One of the main metrics developed in this analysis is an environmental Cost of Ownership (CoO) that extends a typical CoO analysis by also including facility/infrastructure costs and downstream treatment/disposal costs associated with process activities. Other environmental metrics include a set of resource use (water, electricity, chemical use) and waste generated (air, liquid and solid waste) metrics.; This dissertation describes the framework of the EnV-S. Three different applications of this DFE tool are illustrated through case studies. First, the EnV-S is used as a DFE aid during product development cycles to aid the development of a point of use treatment and recycling unit for copper Chemical Mechanical Planarization (CMP) process tools. Next, the EnV-S is used to analyze environmental impacts associated with completed products, comparing Hazardous Air Pollutant (HAPs) abatement technologies from a system selection viewpoint, and characterizing the environmental footprint of a specific technology and product. Finally, the EnV-S to used to inform facility-wide decisions with a specific, industry-wide environmental problem. (Abstract shortened by UMI.)...
Keywords/Search Tags:DFE, Semiconductor manufacturing, Environmental, Env-s, Process, Product
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