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Design of Flash ADCs with Large Offsets using Redundant Comparators

Posted on:2012-12-01Degree:Ph.DType:Dissertation
University:University of California, Los AngelesCandidate:Wang Limketkai, Victoria LuluFull Text:PDF
GTID:1458390008999706Subject:Engineering
Abstract/Summary:
We present a new method which uses redundant comparators with large voltage offsets to design Flash ADCs for input signals with well-known statistics. By framing the problem as a network graph and writing it as a Linear Program, the optimal set of active comparators can be determined for minimizing the quantization noise. This method allows comparator offset standard deviations to increase from an average of 1 LSB in current designs to > 6 LSB. The solution to the Linear Program is a power-efficient optimal quantizer which we will show has many benefits in modern applications, such as in the implementation of autonomous spike-sorting systems.
Keywords/Search Tags:Flash adcs
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