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Electrical performance analysis of a novel embedded chip technology

Posted on:2013-03-25Degree:Ph.DType:Dissertation
University:North Dakota State UniversityCandidate:Sarwar, FerdousFull Text:PDF
GTID:1458390008482930Subject:Engineering
Abstract/Summary:
Recently ultra-thin embedded die technology gained much attention for their reduced footprint, light weight, conformality and three-dimensional assembly capabilities. The traditional flexible circuit fabrication process showed its limitations to meet the demand for increasing packaging density. The embedded die technology can be successfully utilized to develop flexible printed circuits that will satisfy the demand for reliable and high density packaging. With a tremendous application potential in wearable and disposable electronics, the reliability of the flexible embedded die package is of paramount importance. Presented is the author‘s contribution to the novel fabrication process for flexible packages with ultra-thin (below 50 µm) dice embedded into organic polymer substrate and the results from the investigation of the electrical performance of embedded bare dice bumped using three different techniques. In this research, embedded flexible microelectronic packaging technology was developed and reliability of different packages was evaluated through JEDEC test standards based on their electrical performance. The reliability test of the developed packages suggested the better and stable performance of stud bump bonded packages. This research also covered the thinning and handling ultra-thin chips, die metallization, stud bump formation, laser ablation of polymers, and assembly of ultra-thin die. The stud bumped flexible packages that were designed and developed in this research have promising application potential in wearable RFID tags, smart textile and three dimensional-stacked packaging, among the many other application areas.
Keywords/Search Tags:Embedded, Electrical performance, Technology, Ultra-thin, Packaging
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