Address optimizations for embedded processors

Embedded processors that are common in electronic devices perform limited set of tasks compared to general purpose processor systems. They have limited resources which have to be efficiently used. Optimal utilization of program memory needs a reduction in code size by eliminating unnecessary address computations i.e., generate optimal offset assignment that utilizes built-in addressing modes.; Single offset assignment (SOA) solutions, used for processors with one address register; start with the access sequence of variables to determine the optimal assignment. This dissertation uses the basic block to commutatively transform statements to alter the access sequence. Edges in the access graphs are classified into breakable and unbreakable edges. Unbreakable edges are preferred while selecting edges for the assignment. Breakable edges are used to commutatively transform statements such that the assignment cost is reduced.; The use of a modify register in some processors allows address to be modified by value in MR in addition to post-increment/decrement modes. Though finding the most beneficial value of MR is a common practice, this dissertation shows that modifying the access sequence using edge fold, node swap, and path interleave techniques for an MR value of two has significant benefit.; General offset assignment requires variables in the access sequence to be partitioned to various address registers. Using the node degree in the access graph demonstrates greater benefit than using edge weights and frequency of variables.; Static Single Assignment (SSA) form of the basic block introduces new variables to an access graph making it sparser. Sparser access graphs usually have lower assignment costs. SSA form allows variable space to be reused based on variable lifetimes.; Offset assignment solutions may be improved by incrementally adding variables that are not yet part of the assignment, which produces the best cost improvement in the existing assignment has more benefits than a fixed order of incremental assignment.; Optimization techniques have primarily been edge based. Node based SOA technique has been tested for use with commutative transformations and shown to be better than edge based heuristics.; This dissertation demonstrates that heuristics employing these techniques optimize address in embedded processors lowering cost.