Low-voltage low-power analog circuit techniques using floating-gate MOS transistors

This research focuses on advanced analog circuit design for low-voltage and low-power applications based on several new techniques using conventional and floating-gate MOS transistors with standard CMOS process technologies.; As a conventional approach which uses standard MOS transistors, a low-voltage current-mode bandgap reference operated with sub-I V supply is proposed. Also, a new class of low-power analog filters based on charge-transfer amplifiers is introduced. The proposed charge-transfer analog filter can achieve extremely low-power operation.; Another possible approach to achieve low-voltage and low-power operation is to use floating-gate MOS transistors. Analog floating-gate approaches provide many useful options for low-voltage, low-power, and high-precision circuit design. A floating-gate quantized adaptation (FGQA) technique was proposed to implement high-precision analog circuits by removing analog mismatch errors including process variations. As a practical example of the FGQA technique, an array of 7 adapted current sources was implemented. Experiments show that the output currents of the proposed current sources matched to within 0.1%, and the adapted currents show significantly improved accuracy compared to the mismatch error of 5 without adaptation. The accuracy can be improved further by extending the adaptation time.; Recently, a new technique using quasi-floating gate (QFG) MOS transistors has been introduced to simplify initializing floating-gate charge. QFG techniques which can control the initial charge of floating-gate MOS transistors by using quasi-infinite resistors (QIRs) were analyzed to characterize error terms and limitations. Also, several useful quasi-floating gate application circuits, such as QFG multiple-input translinear element circuits, QFG multiple-input CMOS log-domain filters, QFG low-voltage fully-differential amplifiers with QFG common-mode feedback, and a QFG digital-to-analog converter, were demonstrated. Experiments of selected QFG circuits showed very long do settling behavior with large do offset. The settling time is reduced when the QFG circuit uses ac inputs or closed-loop structures. Because QFG circuits are based on capacitor coupling, the do offset occurred by QIRs can be a minor problem.