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Performance comparison between copper, carbon nanotube, and optics for off-chip and on-chip interconnects

Posted on:2008-05-17Degree:Ph.DType:Dissertation
University:Stanford UniversityCandidate:Cho, HoyeolFull Text:PDF
GTID:1448390005979434Subject:Engineering
Abstract/Summary:
For more than 30 years, the performance of silicon integrated circuits has improved at an astonishing rate. The number of functions per chip has grown exponentially, dramatically bringing down the cost per function. However, the relentless scaling paradigm is threatened by fundamental communication limits including excessive power dissipation, insufficient communication bandwidth, and large signal latency. Many of these obstacles stem from the physical limitation of Cu-based electrical wires, making it imperative to examine alternate interconnect schemes for future ICs. The two most important novel potential candidates are optical and carbon nanotube (CNT)-based interconnects.; In this dissertation, for off-chip application, we compare high speed optical and electrical interconnects using relevant metrics, such as power and bandwidth. We find that for a given communication bandwidth, beyond a critical length, power optimized optical interconnect dissipates lower power compared to high-speed electrical links. Beyond the 32nm technology node (with appropriate bandwidth requirement), optical interconnect becomes favorable for distances as little as 10cm. These distances correspond to inter-chip communication. As part of the comparisons, we also compare two different optical transmitter options comprising of a VCSEL and a modulator scheme. For the modulator option, we further presented an optimization methodology for minimizing total optical link power, and obtained the optimum quantum well modulator design parameters - number of quantum wells, pre-bias voltage, and operational parameters (swing voltage) which accomplish the low power design.; For on-chip application, we compare CNT and optical interconnects with Cu interconnects using latency, power, and a novel compound metric-bandwidth density per latency per power, which captures system requirements more efficiently. In the future, because of multi-core architecture, the designers care about the bandwidth density, latency, and power required for global communication. We extensively examine the impact of device parameters - modulator and detector capacitances for optics, materials parameters - mean free path and packing density for CNTs, and system parameters - global clock frequency and switching activity on all the aforementioned metrics.
Keywords/Search Tags:Per, Interconnects, Parameters, Power
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