Low power sub-sampling radio receiver architecture

Radio transceivers have evolved over the last several decades from simple, discrete component based circuits into low power, highly integrated circuits. This transformation has been driven largely by the requirement for lower cost and lower power transceivers with more functionality. New applications for wireless digital communications have emerged that have created demand for these types of transceivers. In highly integrated wireless transceivers that are intended for mobile communications, the power consumption of the receiver is often the most important concern to the radio designer.; This research is focused on architectures for low power integrated radio receivers. The architecture of the sub-sampling radio receiver is identified as a leading candidate for this type of radio. The sub-sampling receiver is analyzed in detail to show design constraints and fundamental relationships specific to this architecture. A specific implementation of the sub-sampling receiver is proposed and block level requirements are derived.; The fundamental concept and requirement of bandpass filtering to enable a sub-sampling architecture to work is explained in detail. The analysis also shows that the bandpass filtering required is high Q and requires high precision tuning. A Q-enhanced filter with direct tuning is proposed as the solution to the bandpass anti-abasing requirements of the sub-sampling receiver.