| In today's advance nano-CMOS process technologies, the digital design flow offers significant advantages over the conventional analog/RF designs, providing numerous incentives to explore digitally-intensive RF solutions. New architectures are also required to cope with the limitations of RF designing in submicron CMOS processes and take advantages of the increasing speed and density of digital techniques.;In this research, a fully digital wideband wireless transmitter is presented. The proposed architecture replaces high dynamic range analog circuits with high speed digital circuits and offers a simple and a flexible architecture, which requires lower area, consumes lower power and delivers higher performance compared to those of the conventional modulators used for wideband systems. The design is based on a standard CMOS process and is suitable for integration with a digital signal processor, memory and logic implemented in such digital process.;A presented transmitter is based on Digital Quadrature Modulator (DQM), which achieves digital modulation in Cartesian coordinate system. The novel architecture employs a single converter, referred as the Differential-like Digital-to-RF Converter (DDRC), as it is based on fully digital combining of the quadrature baseband signals. The DDRC, which is the heart of the DQM, combines functionalities of a mixer, a Digital to Analog Converter (DAC) and an RF filter into a single circuit.;Though the proposed transmitter is optimized to meet the RF specifications of the IEEE 802.16e (WiMAX) standard, it can be used for any other wideband wireless system without major modifications. A simulation platform is built to demonstrate high date rate using 256-point OFDM, 64-QAM in a bandwidth of 10 MHz centered at 3.5 GHz RF carrier.;The proposed architecture was modeled and analyzed in Matlab/Simulink for the WiMAX standard. The conventional digital design was done in VHDL RTL using Texas Instrument's 65-nm CMOS process technology and all high-speed RF digital modules were implemented in Agilent's Advanced Design System (ADS) tool using 90-nm CMOS process technology.;The total area for the digital blocks was 36754mum2 with the power consumption of 5.36mW in 65-nm CMOS process technology.;It is shown that the proposed transmitter meets spectral mask, specified in the WiMAX standard for the unlicensed band, with the margin of more than 20 dB and achieves Error Vector Magnitude (EVM) performance of -35 dB rather than -31 dB, specified in the standard. The resolution of the DDRC was 7-bit, which was able to deliver maximum output power of around 2.7 dBm. The minimum output power was around -39 dBm and thus total dynamic range achieved by this configuration was more than 42 dB. |
