Atomic scale experimental and theoretical studies of high-k gate dielectric interfaces

For several decades, silicon semiconductor devices have been dramatically scaled down to sub-100 nm MOSFET channel lengths in order to achieve higher device density and performance. In this regime, high-k dielectrics which can give large gate capacitances with dielectric films that are physically thicker than corresponding silicon oxide or oxynitride gate dielectrics are needed to reduce the substantial gate leakage current resulting from direct quantum mechanical tunneling across the dielectric layer.; Recently research and development on materials selection for alternative gate stack has converged on HfO2 based high-k oxides (HfO 2, HfSiO4, or HfSiON). In 2007, Intel and IBM also announced their plan to introduce Hf-based high-k for their 45nm production. In general, those high-k oxides are deposited in a process which results in controlled formation of an ultra-thin SiO2-like passivation layer on the Si (100) surface. This SiO2-based interface layer provides the advantages of relatively low defect density afforded by the Si/SiO2 interface. However, defects at the internal dielectric interface between HfO2 and SiO2 may produce fixed charge and threshold voltage instability under bias. In this work, careful analysis is presented to elucidate intrinsic properties of this HfO2/SiO2 interface and to gain knowledge of possible solutions for problems associated with interface defects.; In-situ low angle x-ray scattering technique reveals the phase separation of initially-intermixed HfO2/SiO2 interfaces. Due to the positive heat of mixing (DeltaHmix>), the initially-intermixed HfO2/SiO2 interface experiences phase separation upon high temperature annealing up to 750°C, which results in a sharper interface. The extracted activation enthalpy for phase separation was 2.06 +/- 0.15 eV. Considering the thermal budget of typical CMOS processes, the HfO2/SiO2 interface will encounter this phenomenon during device fabrication.; Density functional theory (DFT) simulations performed on atomistic models of the HfO2/SiO2 interface show that the HfO2/SiO 2 interface introduces occupied midgap states within the band gap. This is a result of undercoordinated Hf atoms at the interface and the mid gap states provide a source of positive fixed charge when non-bonding electrons on the interface Hf atoms are depleted by Fermi level change. Possible remedies of Vfb/Vth shifts by chemical passivation of the HfO 2-SiO2 interface are suggested based on these simulations.; Finally, a study of oxygen transfer from metal gate into high-k dielectrics is presented. Because alternative metal gates are being developed along with high-k dielectrics, how the HfO2/SiO2 interface will be affected by the presence of the metal gate layer is an important issue. Various physical characterization results show that W appears to provide an unintentional source of oxygen sufficient to form stoichiometric SiO 2 at the high-k/Si interface during post-deposition anneals. Although this will increase the EOT of the gate stack, the CV and SR-PES data reveal that the atomic oxygen may improve the electrical quality of the high-k/Si interface. Therefore, oxygen pressure control during W deposition processes will be critical. Further studies will be needed to find process windows, which would make the use of high-work function metals such W more beneficial in the metal/high-k device applications.