| We present a Complementary Metal-Oxide Semiconductor (CMOS) image sensor with non-uniform pixel placement that enables a highly efficient computation of the Discrete Cosine Transform, which is the most computationally demanding step of an image compression algorithm. This technique is based on the Arithmetic Fourier Transform (AFT), which has been shown to be five times more computationally efficient than current Discrete Cosine Transform (DCT) computation methods. Background information on image sensor types, AFT and the modulation transfer function (MTF) is also introduced.;We describe the design and test of the image sensor integrated circuit (IC) fabricated with Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 microm CMOS technology. The hardware and software components of the evaluation platform used for testing the sensor are also covered in detail. We explain how widely-accepted, industry-standard tools can be tailored to meet specific prototyping, testing and measurement goals. We also show results from CAD simulations of the image sensor design as part of the design verification procedure. In essence, we document the process to turn an idea into a finished physical product and to design and develop supporting infrastructure to test, verify and characterize the realized device.;The fabricated image sensor was also exposed to visible light and various images to observe and verify its operation and characteristics. This will also highlight different issues in the image signal processing chain of events. We then conducted and report on qualitative and quantitative studies of the effect of noise on the 2D AFT algorithm. |
