Research On Thermal Noise Models Of Short Channel Field Effect Transistors

Since the MOSFET device was invented,physical modeling of the device has been one of the main fields of device research.The device model lays the foundation for circuit design and can be used to simulate and study the circuit at the computer software level,which provides assistance for circuit design and circuit performance optimization.Therefore,the research on device modeling should be based on the matured and widely applied node process,and it is only the device model created in this way that has practical significance for related circuit design and simulation.The device model and mechanism studied in this thesis are mainly used in analog integrated circuits.At present,the mainstream process of analog integrated circuits is at the 20nm-40 nm level.The device models proposed in this thesis involve those with the 90nm-10 nm node process,which is,currently,the matured manufacturing process and used in the most electronic information products in the industry.With the development of the integrated circuit manufacturing process,the size of the MOSFET device has decreased continuously.As the device size decreases at a rate much faster than the supply voltage does,a stronger electric field appears in the short channel device,which causes the short channel effect of the device to become more significant,and affects the noise characteristics of the device.Accordingly,the development of the device model must keep pace with the advancement of the device manufacturing process.This thesis aims at the impact on the excess noise in the device as the channel transverse electric field enhances as the size of the MOSFET device decreases,and then establishes corresponding models.The main research includes:1.A channel electron temperature model is established to characterize the hot carrier effect.Based on the short channel MOSFET device,the impact of the hot carrier effect on the device performance is investigated as the channel transverse electric field enhances along the channel.The equation of the channel transverse electric field is derived based on the channel potential equation and the boundary conditions of the channel electric field.And then,a model of electron temperature distribution along the channel is established by solving the energy balance equation.Moreover,the mobility degradation effect and the electron velocity are investigated as the electron temperature along the channel rises.The results show that when the device size is reduced to below 90 nanometers,the impact caused by the device size on the hot carrier effect and the mobility degradation effect is greater than that caused by the bias voltage.With the device size reduction,the impact of the hot carrier effect and the mobility degradation effect increases and the electron velocity increases considerably.2.In this thesis,the influences of the channel transverse electric field,the hot carrier effect,and the mobility degradation effect on the thermal noise in conditions of the continuous decrease of the device size is investigated.Then,the impact of short channel effects on the excess noise is analyzed as the transverse electric field enhances and the electron temperature rises along the channel.The results show that the impact of the hot carrier effect on thermal noise increases with the device size reduction.The impact of the hot carrier effect on the increase of the thermal noise is greater than that of the mobility degradation effect on the decrease of the thermal noise,thus resulting in the increase of the thermal noise,which becomes the main factor for excess noise in the device.The influence of the hot carrier effect on the channel thermal noise also increases considerably as the bias voltage increases.Accordingly,the channel thermal noise model of the short channel MOSFET device is established.The new model characterizes more accurately the channel thermal noise of the short channel MOSFET device at 90 nm and below than what the existing device models perform.3.As the device size decreases below 40 nm,the shot noise appears in the MOSFET device,which,together with the thermal noise,has become the factor that contributes to excess noise in the device.Based on the electron velocity model established in this thesis,the drain-source current model is accordingly established in combination with the current density expression and the Pao-Sah model in order to reflect the impact of the increase in electron temperature along the channel and the mobility degradation effect on the drain-source current.Furthermore,a shot noise model and a thermal noise model suitable for devices below 40 nm are established based on the drain-source current model.In this thesis,the impact of the shot noise on the excess noise is analyzed by studying the noise mechanism of the short channel NMOSFET device that changes with the device size reduction and the change function of the thermal noise and the shot noise with the device size decreasing is given.Meanwhile,the existing Fano factor of the shot noise is revised.The research shows that the accuracy of the existing thermal noise model and the shot noise model declines as the device size decreases,which eventually leads to an overestimate of the corresponding Fano factor of the shot noise.The contribution of the shot noise to the excess noise becomes greater as the device size decreases.As the NMOSFET device size is reduced to 10 nm,the noise of the device should be characterized by a mixed pattern of the thermal noise and the suppressed shot noise instead of a single thermal noise.The conclusions of this thesis can be applied to the analysis on the thermal noise of short channel MOSFET devices under 90 nm,especially 40nm-10 nm node process and the design,optimization and simulation of related low-noise circuits.