Investigation On Modeling,Electrical And Thermal Properties Of Interconnect In 3-D IC

The present microelectronic components and systems are moving toward the goal of miniaturization,low power consumption and multifunction.The feature size of the transistor is scaling down and reaching its physical limit.The time delay and power consumption due to the interconnect are increasing.Meanwhile,the processing for improving the integration density is more complex.Thus,the conventional formation of the integrated circuit has already encountered a wide range of bottlenecks.The appearance of three-dimensional integrated circuit(3-D IC)by stacked vertical chips provides a solution for above problems.As one of the key technologies of 3-D IC,through silicon via(TSV)technology can realize the vertical connection of the stacked chips,which offer reduced interconnect length,reduced delay and power consumption,and increased integration density.Meanwhile,the TSV-based 3-D IC has small packaging size and can realize heterogeneous integration.To deal with the electromagnetic and thermal problem in in TSV-based 3-D IC,four topics are discussed in this dissertation including:fast extraction of parasitic parameters,analysis of the signal integrity and the impedance of the power distribution network(PDN),full-wave modeling method based on Laguerre-FDTD,transient thermal simulation and analysis.The details are summarized as follows:(1)Parasitic parameters of TSVs are rapidly extracted and analyzed for three conditions:with low pitch-diameter,near edge or corner of the silicon substrate,with consideration of vertical multilayer media and different Shapes.For the first condition,the moment method are used to consider the effect of depletion region and the proximity effect on the charge distribution of TSVs.For the second condition,the effect of silicon-outer region on the charge distribution of TSVs is evaluated by the moment method combined with image method.The discrepancy between edge/corner case and center case is discussed.For the third condition,the previous methods are extended from two-dimensional to three-dimensional for evaluating the parasitic parameters of TSVs with consideration of the multilayer media along the vertical direction and different shapes.(2)Several signal integrity problems of TSVs and PDN impedance are modeled and discussed.Firstly,the transmission characteristic and crosstalk of TSVs with low pitch-diameter are analyzed based on equivalent circuit model.Secondly,for differential signaling,the transmission characteristic and the corresponding equalization method of differential TSVs is given.Thus a flat output frequency response can be obtained and the eye-diagram is improved.Then the crosstalk on the differential TSVs from the neighboring single-ended and differential TSVs is evaluated.To mitigate the noise interference,a twisted differential TSVs structure and an offset twisted differential TSVs arrangement are proposed.Next,the differential to common mode noise of three asymmetric cases for differential TSVs is discussed.For mixed conventional and coaxial TSVs network,an equivalent circuit model is established to predict the insertion loss and crosstalk level.By the proposed model,the shielding effectiveness of the outer conductor in coaxial TSV is evaluated.And the crosstalk due to the bumps connecting TSVs in stacked chips is also analyzed.Finally the on-chip PDN for TSV based 3-D IC is analyzed in term of TSVs arrangements and the size of TSV by the proposed model.(3)Some improvements have bee made on the convetional Laguerre-FDTD method to analyze the interconnect of the interposer in 3-D IC.Two methods called extended Laguerre-FDTD and conformal Laguerre-FDTD are proposed.In extended Laguerre-FDTD method,the current-voltage relationship of the lumped elements is combined with the Maxwell's equations,and then transformed into the Laguerre domain.Thus,the hybrid microwave circuit with lumped element can be simulated by the extended Laguerre-FDTD method.And the numerical dispersion error due to the large time step can be overcomed.Then,the 2-D and 3-D conformal Laguerre-FDTD methods for the modeling curved surface are derived.They are more accurate than the conventional Laguerre-FDTD method based on the staircasing approach.The increases in computational cost brought by refinement can be avoided.Utilizing the conformal Laguerre-FDTD method,the impact of PDN resonance on signaling in glass interposer is evaluated.(4)A transient thermal simulation method called Thermal-WLP is proposed for 3-D IC.This method uses weighted Laguerre polynomials(WLP)as basis functions and Galerkin' s method as testing procedure,which eliminates the time variables of the temperature field.Thus,a marching-on-in-order scheme can be obtained and may be more efficient on computation than those march-on-in-time schemes of conventional numerical methods,especially for 3-D IC with complex structures such as TSVs.Two numerical examples are presented to validate the accuracy and efficiency of the proposed method.Finally,the coupling noise between TSVs and circuits under non-uniform temperature distribution is computed and disscussd.