Research On Fabrication Processes And Characteristics Of Graphene Field Effect Transistors

As silicon devices scaling down and closing to the limit,people thought about the new material to replace all or part of the function of silicon.Then they prepared to fabricate new semiconductor devices.Since the discovery of graphene in 2004,due to its excellent properties such as high hardness,high mobility,many researchers regarded it as one of the candidate materials that can replace silicon.Some characteristics of the graphene field effect transistors?GFETs?aroused the attention of many researchers.With the deepening of the research,some problems appeared.For example,the zero band gap characteristics of graphene made the on-off ratio of GFETs low;High specific surface area of graphene made it easier for the transistor performance affected by environment;The influence factors for graphene to realize high-speed device was still not fully explored clear.To solve above problems,this paper conducts a study on the graphene transistor high on-off ratio,the influence of graphene transistors by the external environment and the test conditions,the effect of the electrical properties of graphene transistors by the device size.Specific content is as follows:1.Relying on the micro-fabrication platform in State Key Laboratory of Electronic Thin Films and Integrated Devices,photolithography,dry etching,electron beam evaporation,oxidation,and diffusion techniques are researched.The structures of graphene transistors with global back gate,buried gate and top gate are fabricated respectively.The advantages and disadvantages,and common applications of various graphene transistors are analyzed.2.A high on-off ratio graphene transistor is fabricated by planar semiconductor process.This transistor uses natural alumina as gate dielectric,and adopts the embedded gate structure.Its switch ratio reaches 10⁵.Then the experimental phenomenon is explained.3.The influence on graphene transistors by the external environment is researched.After the transistors are heated in vacuum,P-type impurities are reduced,and the mobilities of the transistors are enhanced.But the transistors are heated in atmosphere,the change trends of the doping characteristics and mobilities are the opposite.After the graphene transistors with natural alumina placed in the atmosphere for a month,P-type impurities reduce,and the mobilities increase.These phenomena indicate that the natural alumina plays a protection role.Basied on this phenomenon,we think the aluminum atoms in the surface of graphene continue to oxidize.4.The hysteresis effect of graphene transistors is researched.The graphene transistors with SiO₂,HfO₂,and?-Si gate dielectric are fabricated respectively.Their hysteresis effects are observed.As to the transistors with SiO₂ and HfO₂ gate dielectrics,the Dirac point voltage size is related to the gate voltage size and scan time-length before the Dirac point appears.The gate voltage has larger size or longer scan time,the Dirac point voltage is larger;conversely,it is smaller.However,in the transistors with?-Si gate dielectric,the change of Dirac point voltage shows a reverse trend to that in the transistors with SiO₂ and HfO₂ gate dielectrics.After analysis,we think the hydrophobicity of?-Si,the hydrogen atoms and Si-H bonds paly a role.5.The influence on electrical characteristics of transistors by graphene channel size is researched.The graphene transistors with same distance between source and drain and different gate lengthes have been fabricated.The transistors with longer gates show the larger transconductances.This phenomenon attributes to the larger gate modulation area.Besides,the graphene transistors with different distance between source and drain and same gate lengthes have been fabricated.The transistors with the longer distances show the smaller transconductance.We think the series resistances between gate and source?drain?electrodes decrease the transconductances.Finally,the graphene transistors with Si gate electrodes have been fabricated,and self-aligned graphene transistors with Si gate electrodes have been proposed to shorten the distances between the gate and source?drain?electrodes.