Research On New Graphene Field Effect Transistors

With the birth of single-layer graphene,the concept of two-dimensional materials was first proposed,which attracted researchers in various fields to s it.Among them,the use of graphene as a channel material for semiconductor devices is one of the very important research directions.However,because graphene is a zero-bandgap material,it cannot effectively turn off the graphene field-effect transistor manufactured by the planar process GFET(Graphene Filed Effect Transistor),which greatly limits the application of GFETs in large-scale integrated circuits.In response to the above problems,In view of the above problems,this paper prepares a new type of GFET that can be effectively turned off based on the gate extraction/injection mechanism,and analyzes its turn-off mechanism;Further,the effect of parasitic resistance brought by the uncovered gate area of the traditional GFET on the performance of the GFET is analyzed in detail,and this problem is improved by preparing a self-aligned GFET.In addition,this article also explores the application prospect of this new type of GFET based on the gate extraction/injection mechanism in the memory field based on the memory window similar to the P-channel ferroelectric transistor found during the testing of the amorphous silicon gate dielectric GFET.The details are as follows:1.The basic structure and excellent characteristics of graphene are briefly analyzed and introduced,and then the research work on graphene field effect transistors is introduced.2.Four mature methods for preparing graphene and their principles are introduced,and graphene films are grown on a copper metal substrate.Then,based on the traditional wet transfer process,by adding acid and alkali cleaning steps,successfully reduced the residual contaminants on the graphene surface.3.Based on the gate extraction/injection mechanism,using a semi-insulating material such as aluminum oxide as the gate dielectric,a top-gate GFET with a 1.7×10~6on-off ratio was successfully prepared,which effectively realized GFET's turn-off and controllable turn-on.The mechanism of the turn-off and turn-on was qualitatively analyzed.Based on this,the hysteresis effect was studied,and its hysteresis effect was compared with the traditional silicon gate dielectric GFET has the opposite trend,and the hysteresis effect becomes more and more obvious as the temperature increases.4.In the process of preparing the GFET,it was found that there is an uncovered gate region in the traditional non-self-aligned GFET.Through theoretical analysis,it was found that the parasitic resistance brought by these areas will reduce the transconductance and drain current of the GFET,and the cut-off frequency will also be reduced.Finally,by improving the preparation process of the GFET,a GFET with a self-aligned structure is prepared.Through test comparison,it is found to be consistent with the results of theoretical analysis.5.During the test of the buried-gate amorphous silicon gate dielectric GFET,we found a storage window similar to the P-channel ferroelectric transistor transfer characteristic curve,combined with the gate extraction/implantation mechanism and our The observed turn-off phenomenon,we believe that GFETs with semi-insulating materials as gate dielectric materials have great potential for the preparation of non-volatile memories,and put forward some ideas to provide some ideas and directions for further research.