| In recent years,in order to meet the needs of miniaturization and integration of the system,antenna-on-chip and antenna-in-package have become two of the research hotspots in the world.However,due to the limitations of the cost and the semiconductor technology,the disadvantages of on-chip antenna with low gain,low efficiency and narrow bandwidth have hindered its further application in practical engineering.Therefore,how to improve the performance of the on-chip antenna is worthy to study.In addition,for the packaged antenna,it is necessary to further study the problems such as the miniaturization of the antenna,the integration of the antenna and the active circuits in the package,and the impact of the package on the performance of the antenna.In this dissertation,the specific research contents of the antenna-on-chip and the antenna-in-package in microwave and millimeter wave are as follows: 1.Study on hybrid integrated antenna based on on-chip antennaIn order to overcome the on-chip antenna's disadvantage of low gain,it is proposed that three methods can be used simultaneously to improve the antenna gain with hybrid integration technology.Firstly,an on-chip microstrip patch antenna is designed using a 0.18-?m CMOS SOI process with a high-resistivity silicon substrate instead of a conventional lossy substrate.The antenna is designed with a ring structure to reduce the antenna size.Then,an external dielectric resonator is introduced to suppress the surface wave radiation of the antenna and increase the antenna gain.Finally,an off-chip ground plane is proposed to further impove the gain of the antenna.The advantages of the off-chip ground structure are analyzed in detail compared with the on-chip ground structure.It is pointed out that the off-chip ground structure is more suitable for the practical engineering applications and this structure is also used in the other on-chip antenna design presented in this dissertation.Additonally,the influence of assembly deviation on the performance of the antenna is evaluated,and some design suggestions are proposed.The measured results show that the proposed antenna has a bandwidth of 6% and a gain of 7.8d Bi at the center frequency of 67 GHz with a chip size of only 0.7×1.25mm2.Furthermore,it is seen that the proposed antenna has obvious advantages in both of gain and efficiency according to the literature comparison.2.Study on frequency reconfigurable on-chip antennaTo overcome the on-chip antenna's shortcoming of narrow bandwidth,the method of employing on-chip switches is proposed to improve the antenna bandwidth by adjusting the resonant frequency of the antenna.The equivalent circuit and parameter extraction of the switch are studied firstly.Then the influence of the gate width of the switch transistor on the antenna bandwidth and gain is investigated.The optimized transistor gate width is determined by the tradeoff between the bandwidth and the gain of the proposed antenna.Addtionally,the influence of the layout of the switch control line on the antenna performance is studied,and an optimized layout is proposed.Furthermore,for an off-chip reflector is used to improve the gain of the antenna,the influence of the size and the material of the reflector on the performance of the antenna is studied,and then the optimized parameters of the off-chip reflector are determined.The measured results show that the proposed frequency reconfigurable antenna has a bandwidth of 53.4%,which has covered the whole Q-band frequency.The maximum antenna gain is 3.3d Bi and the chip size is 1.1×1.7mm2.It is very suitable for the miniaturization of Q-band broadband communications.3.Study on on-chip antenna and antenna array based on on-chip transceiver systemAn on-chip antenna is integrated with an on-chip transceiver system in a single chip.The method of introducing an off-chip guard ring is proposed to suppress the surface-wave propagation and improve the antenna gain.The principle of guard ring suppressing surface wave is analyzed in detail,and the design process is illustrated.The simulation results show that a maximum gain improvement of 5.8 d Bi can be obtained by using this guard ring.In addition,the influence of the metal density rules of the CMOS process and the assembly deviation on the antenna performance is studied.Some suggestions on the simulation model setup as well as on the assembly are proposed.Furthermore,the influence of the silicon substrate under the transceiver on the antenna performance is studied,and the coupling between the antenna and transceiver circuit is evaluated.Finally,a 4×1 phased array is designed by using this monolithic transceiver system which is integrated with an on-chip antenna.The corresponding power distribution network and the gold wire matching structure are designed and the function of beam scanning is tested.The measured results show that the pattern of the antenna array is in good agreement with the simulation results,and a scanning range of-28°~28° can be achieved at the center frequency of 17 GHz.4.Study on packaged antenna based on QFN packageA passive packaged antenna and a packaged active integrated antenna(AIA)are designed based on a QFN ceramic package respectively.In the design of the passive packaged antenna,a patch antenna with 1/4 wavelength is adopted to achieve the miniaturization of the antenna.At the same time,the sheet-shorted structure instead of the traditional vias-shorted structure is proposed to further reduce the size of the antenna.The impact of the bonding wire length and the relative position of the package and the antenna on the performance of the antenna is studied.Some valuable suggestions are given.The measured results show that the proposed antenna has a bandwidth of 12% and a gain of 4.1d Bi at the center frequency of 37 GHz with a size of only 1.1×2mm2.For the packaged AIA,the required amplifier chip is designed using a 0.15-?m Ga As PHEMT process firstly.The tested results show that the amplifier works in 33.2GHz~37.6GHz with a gain of 13.6d B~14.5d B and the output saturation power obtained in the bandwidth is from 21.0d Bm to 22.8d Bm.Then based on the available space in the package,a 1/4 wavelength patch antenna based on a low permittivity substrate and a 1/2 wavelength patch antenna based on a high permittivity substrate are designed.The bandwidth and the gain of these two antennas are compared and the antenna with a higher gain is manufactured and tested.In addition,the influence of the package parameters on the antenna performance is studied and the reasons are analyzed,which is meaningful for implementing a packaged system with more fuctions in the future.The packaged AIA is tested and a measured gain of 18.9d Bi is obtained at 35 GHz.Compared with other AIA reported in the literature,the proposed AIA with a sealed QFN ceramic package is more suitable for the practical engineering applications. |
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