Research On Key Techniques Of Power Analysis Resistant Security Chip

In recent years,with the rapid development of information technology communication,it has become an essential part in our daily life and brought enormous convenience to people's work and life.Information security as an important technical support of the information tech-nology is paid close attention by more and more people.With continuous improvement of power analysis method,as the most important carrier of the cryptographic algorithm,security chip has been receiving more and more attention in the research of its security.Therefore,how to design and implement a security chip that can effectively resistance to power analysis has become an important issue to be solved.Aiming at the security threats and practical application require-ments of modern security chips,this dissertation proposes a security architecture for security chips.In order to improve the flaws of the traditional security chip,from security architec-ture,power analysis technology and security realization aspects,this dissertation analyzes the security protection.(I)To solve the security problem of security chip,a security architecture is proposed in this dissertation.In addition to the cryptographic algorithm,security chip also exist for operation,storage and other function module components.Therefore,during the design and research,we need to asses the feasibility of function components and allow them to meet algorithms' security requirement.Finally,based on the safety design criteria,this dissertation proposes a security chip architecture design,and implements the security of the chip system.(II)With the continuous improvement of power analysis,as one of the most important function module of security chip,AES algorithm is facing the severe security situation.For this security problem,a security technology based on the physical properties and power con-sumption characteristics of combinational logic is proposed in this dissertation.Compared with the other methods,we only need to choose corresponding logic type in the implementation process of algorithm.This design requires no additional hardware overhead and achieve eas-ily.Moreover,we use the true random number generator to random fuzz the algorithm logic.Implementation results show that the design resists power analysis successfully.(III)SM4 is a block cipher proposed by the Chinese government.With the continuous promotion of this algorithm,some significant problems have been exposed.Aiming at the importance of the security,a security logic of SM4 algorithm resistant to power analysis is pro-posed in this dissertation.The security logic is implemented based on the multiplicative mask and an improvement logic which can resist the zero-value attack.Moreover,this dissertation also proposes a finite field inverse which implemented in form of look-up table.Simulation results confirm that the use of counteractive measures resistant to power analysis is credible.(IV)With its special functions and roles,security chip has attracted wide attention and interest of researchers since it was born.In modern information security system,chip security can be understood generally in dual meanings:to ensure algorithms are reliable and to guarantee hardware security.To the former the command,with the recent advancements in cryptography,algorithms have a solid basic of mathematics.But,the realization of security chip remains a few problems to be worth thinking.In this dissertation,according to the security architecture and security threats,we analyze its design and implementation from true random number generator,hardware security and system security.