A High-performance Band-pass Sigma Delta Analog-to-Digital Converter

In recent years,micromechanical accelerometers have been widely adopted in military,industry and customer products.The high precision capacitive accelerometer SoC integrates the micromechanical sensor with the peripheral circuits on a single chip,makes it smaller and chipper.Along with high resolution,low noise,and better temperature coefficient,the high-precision capacitive accelerometer SoC has played a crucial role in frontier domains such as aerospace industry,national defense,military projects and seismic exploration.Therefore,it has become a research hotspot,for its future development is prospected to be very broad.In accelerometer SOC,before supply the acceleration signal to digital circuit for digital signal processing,the analog signal generated by sensor must be converted to digital signal by the Analog-Digital Converter.However,most of the research showsthat the ADCs has become the bottleneck of system accuracy.Accordingly,high-precision ADCs for micromechanical accelerometer have great research value.Sigma Delta modulation technology uses oversampling and noise shaping to realize high resolution without precise analog elements,which is the best way to realize high precision low power AD conversion with CMOS technology.Manyresearch and products have shown that the low-pass ??ADCs can get 18bits or higher resolution within 20 KHz audio bandwidth.However,in order to reduce the impact of low-frequency flicker noise,the capacitive accelerometer modulates the acceleration signal to 200 KHz frequency by the carrier modulator circuit,and band-pass ??ADC is more applicable in consideration of power consumption and circuit complexity.At present,most of domestic and foreign researches about band-pass ??modulation technique mainly focus on wireless communication area instead of micromechanical sensors applications,while the researches which have chip testing results are very rare.Under this background,this paper presents an in-depth study of band-pass ?? modulation technique,including a design and implementation of high-precision,low power consumption band-pass ?? ADC for micromechanical accelerometer SoC application.The main work and innovation of this paper include:The differences between various types and structures of ?? modulators are systematically analyzed,and a single-loop high-order ?? modulator is chosen according to the application requirements of this work.To achieve high conversion accuracy and ensure the loop stability of the high-order ?? modulator,a 6th order single-loop feed-forward band-pass ?? modulator structure is proposed.Studies on stability of both high-order single-bit quantized ?? modulator and multi-bit quantized ?? modulator are conducted,and a practical condition of stability is given.On this basis,single-loop 6th order 1-bit quantized and 4-bit quantized band-pass ?? modulators are proposed.Theoretical analysis and of non-ideal factors in the modulator circuit are conducted,and a Matlab simulation model is built.The impact of capacitor mismatch in feedback DAC on the global linearity of modulator is analyzed,and a feedback DAC non-linear model for multi-bit modulator system simulation is proposed.The circuit and layout design of single-bit and 4-bit quantized ?? modulators are completed.To avoid the impact of layout parasitic parameter,a number of post-simulation verification and layout optimization are conducted.As the ?? modulator output includes large amount of out-band noise,a hardware saving digital filter is designed.And a dynamic element matching circuit is designed for the multi-bit quantized modulator,to reduce the non-linearity caused by the capacitor mismatch in feedback DAC.Two types of low power high resolution band-pass ?? ADCs for accelerometer applications are implemented in 0.181?m 1P6M mix-signal CMOS technology.The single-bit quantized ?? ADC,occupies an area of 5 mm2 with 10 pads,the supply voltage is 3.3V for analog,and 1.8V for digital.The modulator gets a high SNDR and DR,measurement result shows a 90 dB peak-SNDR and 96 dB DR are achieved over 4 KHz bandwidth.The power consumption of the ADC chip is 5.8 mW,which is suitable for low power high resolution sensor applications.