The Study Of High-performance ?-? Transistors With High-? Gate Dielectrics

?-? semiconductors are embracing a new era of revolution in electronic information.Diverse applications such as low-power logic circuits,high-frequency RF electronics,high-brightness illumination and high-power electronic converter have motivated great demand for group III-V transistors.Unlike silicon with excellent native oxide,passivation on the surface of III-V compound semiconductors results in high density of interface traps,impeding the transistors far from satisfactory.Therefore,optimization of passivation methods and dielectrics is crucial to achieve high-performance ?-? electronics.In this thesis,in order to realize the applications of ?-? semiconductors in different kinds of fields,atomic layer deposited high-k gate dielectrics are introduced to better passivate ?-? semiconductors and achieve high-performance ?-? transistors.Based on transport characteristics in ambient and cryogenic temperatures,the influence of high-k gate dielectrics on the performance of ?-? transistors has been thoroughly studied.And great emphasis is placed on the correlation between interface traps and carrier transport in high-k/?-? compound semiconductors stacks.As one of the earliest studied ?-? compound semiconductors,GaAs has been widely used in microwave electronics.Passivation of GaAs surface has long been drawing intensive attention.In order to reduce surface traps on GaAs,this dissertation places great emphasis on studying atomic layer epitaxial La2O3 on GaAs,and its effect on transport properties in MOSFET.This dissertation studies low temperature transport characteristics and interface properties of La2O3/GaAs MOSFET for the first time,and explains that reduction of interface traps will increase carrier mobility in the transistor channel.Conductance method model has been established based on La2O3/GaAs MOSFET,and interface trap density distribution and Fermi level movement and its efficiency has been extracted experimentally.Finally,transmission-line model has been proposed to complete trap modeling in long-channel transistors,and further validates experimental results from conductance methods.After achieving effective passivation by depositing high-k gate dielectrics on GaAs,this dissertation further studies another ?-? compound semiconductor,AlGaN/GaN heterojunction,which has been widely used in conversion circuits.Different high-k dielectrics have been deposited by ALD system to achieve effective passivation.The wide bandgap and high mobility of AlGaN/GaN heterojunction makes AlGaN/GaN core semiconductor materials for future high-efficiency and high-density power electronic devices.In regard to the application of AlGaN/GaN HEMT in power electronics,this dissertation comparatively studies how high-? dielectrics affect transistor transfer characteristics,output characteristics,breakdown characteristics,current collapse,and noise characteristics,and explains the role played by interface traps in transistor performance.This dissertation proposes HfSiOx as gate dielectrics for AlGaN/GaN MOSHEMT for the first time,and achieves high performance power switching devices.Meanwhile,by depositing HfLaOx as gate dielectrics on AlGaN/GaN MOSHEMT,a 50%reduction in on-resistance has been achieved thanks to the effective passivation.Since AlGaN/GaN heterojunction is normally-on,the threshold voltage of HEMT has to be enhanced to achieve reliable operation in power electronics.However,traditional methods of etching barrier layer under gate will incur large amount of traps and deteriorate device performance.In this dissertation,recess damage has been reduced after the deposition of high-k HfSiOx,and the threshold voltage has been enhanced.Etching time has been optimized to achieve a tradeoff between threshold voltage,on-resistance and breakdown voltage.Because of the difficulty in controlling the recess depth,this dissertation proposes gate injection transistors with p-GaN gate and selective etching method of p-GaN over AlGaN.Both methods can achieve positive threshold voltage and enhancement mode operation.Driven by the rapid development of high density integrated circuits,dimensions of III-V transistors is shrinking,and short channel effect is becoming much more serious.Gate-all-around nanowires can enhance gate control capability and suppress short channel effect.In regard to structural characteristics of gate-all-around nanowires,this dissertation proposes the passivation of nanowires with atomic layer deposited high-?Al2O3,and studies the leakage mechanism of this 1.7 nm EOT gate dielectrics.Ohmic conduction is proposed as the main leakage mechanism behind.Also,transport characteristics under cryogenic temperatures reveals the correlation between interface trap density and device switching characteristics,and the origin of off-state leakage current.Finally,this dissertation discuss ballistic transport in ultrashort channel device and short channel effect.Apart from the application of gate-all-around nanowires in high-speed logic devices,a novel magnetoresistance device has been proposed based on this structure,which can also be compatible with CMOS technology.When the electrical fields applied horizontally over the nanowires is strong enough,hot carriers in the channel will ionize neutral centers and impact ionization will occur.The impact ionization rate will be suppressed under vertical magnetic fields,and exhibits magnetoresistance.This dissertation proposes ultra-sensitive,highly symmetric and repeatable magnetoresistance in nanowires based on impact ionization for the first time.In this three terminal transistor,the modulation of magnetoresistance by horizontal and vertical voltage has been studied.The mechanism behind magnetoresistance has been studied,and the different principles of impact ionization in depletion region and inversion region has been proposed.Moreover,this dissertation probes the effect of temperatures on interface traps and impact ionization.Finally,the repeatability of magnetoresistance device have been verified,and the negative differential resistance has been explained.