| With the rapid development of the processors' performance,scene information can be intuitively presented to the user.However,with the user's increasingly demand of imaging resolution and imaging effect,the performance of the image processing plat-form can't handle with such requirements,even improve the performance of the image processing platform.Until now,image processing platforms always use a monotony architecture to assist the host to complete the post-processing tasks,and a single sensor to capture scene information data.They are more depended on software algorithms to handle the user's demand of high resolution imaging and high performance imaging,which is difficult to achieve the real-time imaging requirements.The most important reason is that they are almost post-processing methods and they don't need to consider such demands.This architecture is more dependent on software algorithms to com-plete the user application requirements response,the algorithm processing speed is too slow to meet the requirements of the real-time imaging,such as stereo vision,virtual reality,augmented reality and other applications.In addition,high-resolution and high-frame rate of image acquisition requires a higher front-side bus bandwidth to complete the task of image data transmission.But the platform which is improved based on the image processing platform cannot meet the requirements of high-bandwidth applica-tions,such as high dynamic range imaging,super-resolution imaging and other appli-cations.Therefore,the method of post-processing platform cannot meet the real-time and high-bandwidth requirements brought by the visualization,which makes us have to consider the revolution of the image processing platform brought by the On-site Video Enhancement Processing.For the intuitive requirements and performance defects of image processing platform,the paper proposes a method of On-site video augmenting.The algorithms used in image restoration and augment are accelerated by FPGA hard-ware to solve the problem of real-time and high-bandwidth bottleneck caused by visu-alization.By using single-len and multi-sensor architecture,On-site video processing platform collects high dynamic range image information to compensate for the long-time imaging defects caused by multiple exposure of single camera,which meets the real-time requirements of users.Using custom UPI high-speed bus interface can enlarge the weak information which is hard to be detected directly,thus to meet the needs of high bandwidth applications.In this dissertation,several key problems of the on-site video enhancement are con-sidered,and a hardware accelerating scheme for the overall system is given to complete the research of on-site processing of the image enhancement technology.To solve the problems of information restoration in visualization,the author use the high dynamic range imaging algorithm to restore the scene information,then summarizes the methods of single camera imaging,multi-camera imaging and single-lens multi-sensor imaging,and at last proposes a high dynamic range video algorithm that can be processed in real time.In order to solve the problem of information enhancement in visualization,this paper combs several image enhancement methods and their advantages and disadvan-tages,simplifies the construction of Laplacian pyramid and the pipeline processing of?R filtering to achieve real-time processing requirements.In summary,the bottleneck brought by visualization can be divided into software part and hardware part.The soft-ware part can be solved by two kinds of on-site video enhancement algorithms,and the hardware one can be solved by hardware accelerae technology.The main research work and innovations of this dissertation include:(1)This dissertation summarizes research results of the existing HDR Image al-gorithm and HDR Video algorithm,and proposes real-time HDR Video algorithms and methods of hardware acceleration.Firstly,aiming at the HDR Image algorithm,the dissertation proposes a method of improved Ward weight function selecting,further-more utilizes third-order Bezier function deducing fitting formula of camera response curve,which can restore Radiance Map in case where it is not required to know time of exposure accurately;Meanwhile,this text proposes an optimized global TMO based on logarithmic algorithm and photographic algorithm,which can decrease radiance value of highlighted area without affecting contrast,and ensure that the image dose not ap-pear saturation distortion;In addition,we propose the hardware solution of HDR Video strobe,which adopts leakage integrator model to processing parameter of independen-t calculation for each frame,and makes that brightness parameter for each frame is relatively unified during the tone mapping process.Aiming at the memory intensive problems during the process of accelerating algorithm by hardware,the paper adopts quad-tree coding for the camera response curve,and compared with the method of di-rectly storing the camera response curve,the method in this dissertation can save at least 99.6%of BRAM resources;Aiming at the computationally intensive problems during the process of accelerating algorithm by hardware,we adopt the method of polynomi-al approximation to simplify complex exponential and logarithmic operation to shifts and addition,meanwhile accelerate the speed of software algorithm loop computation.by utilizing Ping-pong buffer for parallel multichannel pipelines,combined with FPGA embedded DSP slice resources.Compared to Lapray and Mann' s FPGA hardware processing platform,the paper takes less time to process the same resolution image,and in the 120MHz system clock,can be completed a video or image output within 15.3ms for the 19.58MB standard video data with resolution of 1920×1080.(2)This dissertation summarizes research results of current motion amplification algorithm,and demonstrated the reason why Larangian image enlargement method is not suitable for hardware implementation by analyzing the advantages and disadvan-tages of method of Lagrangian image enlargement and Euler image enlargement.Aim-ing at the real-time requirement of algorithm on-site disposal,the paper proposes a fast Euler image enlargement algorithm,and compared to software algorithms implement-ed on inter(R)Xeon(R)processors(3.3GHz)based on Matlab software,implements 16.1 times the hardware acceleration multiple,by reducing the number of pyramids,fixing enlargement factor and other processing,without affecting the visualization of the display results.(3)This dissertation summarizes front-side bus customization method and method of real-time image processing platform construction,and based on customization bus interface,proposes hardware acceleration method with multiple message queues and the core of image enhancement engine.In this paper,we adopt two FPGA to complete the on-site processing tasks,based on function-level task cutting method schedules FPGA multi-task,and completes FPGA inter-chip interconnection through the SRIO bus with front-side bus adopting PCIe bus.Furthermore,we design one flexible FPGA high-speed serial bus interface UPI(Unified PHY Interface),and provide corresponding API function.Adopting sharing PHY physical layer architecture,combined with Xilinx F-PGA high-speed serial transceiver,the interface can make use of the same high-speed serial transceiver time division transmission with PCIe protocol packets and SRIO pro-tocol packets,and it is transparent to the upper user.For the platform without external PCIe/SRIO cable connectors,we can adopt this interface to connect multiple platform-s indiscriminately,to complete high-bandwidth acquisition tasks for front-end frame data,and improve flexibility of processing platform. |
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