Research Of The Readout Electronics System For High-granular Digital Hadronic Calorimeter Of CEPC

In 2012,the discovery of a Standard Model(SM)like Higgs boson at approximately 125 GeV at the LHC,has brought an opportunity to investigate the feasibility of a lepton collider for studying and precisely measuring the properties of Higgs boson.In 2013,a study group which is led by Chinese physicists was formed in Beijing to investigate the feasibility of a high energy Circular Electron Positron Collider(CEPC)as a Higgs and/or Z factory,and a subsequent Super proton-proton Collider(SPPC).The energy measurement of particles is achieved in terms of the summation of jet energy in calorimeters,which are produced by particle-particle collisions.Hence,the energy of particles is determined by the precision of energy measurement of jets.Approximately 72%of the jet energy is measured with the precision of the combined electromagnetic calorimeter(ECAL)and hadronic calorimeter(HCAL)for hadrons.However,the jet energy resolution is limited by the relatively poor hadronic energy resolution.In addition,high energy and high luminosity proposed by the CEPC will bring a series of challenges to the calorimeters,especially the high pileup event.Since traditional calorimeter has a poor spatial resolution,it can't separate an adjacent event from the other.Which makes the jet energy resolution even more worse.In recent years,Particle Flow Algorithm(PFA)has been proposed to improve the jet energy resolution.As a result,high-granular calorimeters which based on it are developed successively.As the first international collaboration for high granularity calorimeter system,the CALICE collaboration has successfully developed some prototypes of both ECAL and HCAL for the international linear collider(ILC).Both ECAL and HCAL have 2 different implementation ways:one is the analogue way,the other is digital.However,in China,the research of high-granular calorimeters for the CEPC is just begun.Here,in this paper,we will propose a readout electronic system for a GEM based high-granular digital hadronic calorimeter which based on the advantages of the previous prototypes and take into consideration the requirements specific for the CEPC.The thesis is arranged as follows:In chapter 1,high energy and high luminosity features are becoming a new trend of the current particle physics experiment,which demands for a high energy resolution of calorimeters.It points out that the traditional calorimeter would be replaced by high-granular calorimeter which based on the PFA.Before the CEPC proposed,the ILC had a rich experience in developing high-granular calorimeters which becomes the reference design of the CEPC.In chapter 2,the types and functions for the HCAL of the calorimeter system have been described.Compared with the conventional HCAL,the high-granular HCAL is capable of separating charged and neutral hadrons.According to the PFA,roughly 10%of jet energy is carried by neutral hadrons which will be measured with HCAL.As mentioned before,HCAL has two 2 different implementation ways according to the CALICE definition.The AHCAL which is implemented in analogue way is a sampling calorimeter,it has steel plates as the absorber and scintillators as the sensor.Analog signals are read out using wave length shift fibers(WLSF)coupled with SiPMs.In first generation of AHCAL,18-channel front-end ASICs(ILC-SIPIM)are used together with external 16-bit ADCs for digitization.While,in second generation,36-channel front-end ASICs(SPIROC)with internal Wilkinson ADC are used instead.For readout in digital way,there are 2 different prototypes according to the number of threshold.A HCAL with only one threshold readout is called Digital Hadronic Calorimeter(DHCAL).A HCAL with multi-threshold readout(e.g.3 thresholds)is called Semi-Digital Hadronic Calorimeter(SDHCAL).Both of them use steel plates as their absorber and RPC gaseous detector as their sensor,and have a total number of approximately 4× 105 channels.The DHCAL uses 64-channel front-end ASICs(DCAL)with a single threshold readout,while the SDHCAL uses 64-channel ASICs(HARDROC)with three threshold readout.In this section,the details of the data acquisition system structure for both of them from the front-end to the back-end are fully described.The beam tests result shows that in comparison to single threshold,the use of the three thresholds has a better energy resolution at energies higher than 40 GeV.In chapter 3,a pre-research scheme of high-granular hadronic calorimeter for the CEPC has been described.Both analogue and digital ways have their own advantages and disadvantages.Taking account of the granularity,total cost,power dissipation and the percentage of the fired channels for each event,the digital way is much more suitable for the CEPC.In order to get a better resolution at higher energies,the semi-digital readout scheme is finally chosen for the CEPC-HCAL.The steel plates are chosen as the absorber for the HCAL due to their attractive price and high mechanical strength that allows the building of a self-supporting structure without auxiliary supports.Compared with other detectors,the gaseous detectors are ideal candidates since their high efficiency,excellent homogeneity,cost-effectiveness,simplicity and allowing fine segmentation.The GEM detector is finally chosen as the sensor with a pixel of 1 cm×1 cm pad for readout.A low noise,low power dissipation ASIC MICROROC is chosen as the front-end chip.It has 64 channels,3 thresholds for readout as well as a suitable dynamic range for GEM.The architecture of data acquisition system for future is based on the SRS system,which has less number of interconnection boards than that of DHCAL or SDHCAL.The clock synchronization system for future is also discussed.In addition,the requirements of the CEPC-HCAL are presented in this section.In chapter 4,a readout electronics system based on the MICROCROC of the prototype for the HCAL in phase I is designed.It mainly consists of 3 parts,an anode pad array readout board,a MICROROC test board and a DIF board.The pad array board which has an active area of 30 cm × 30 cm in terms of 900 pads will be attached on the GEM detector.Analog signals from connectors on the other side of the pad array board are connected to the MICROROC test board using kapton cables.The MICROROC test board contains 4 daisy chained ASICs in terms of 256 channels.The control and data acquisition are implemented by the DIF.In chapter 5,performance tests are carried out with a signal generator and a real GEM detector.Detailed test results are used to study the performance of the front-end electronics before and after the join of the GEM detector.Finally,in chapter 6,we summarized the whole work and proposed an outlook.