Investigation Of Retention Characteristics And Negative Capacitance Effect Of Ferroelectric Field-effect Transistors

In recent years, ferroelectric gate field-effect transistor (FeFET), as one type offerroelectric random access memory (FeRAM), is currently regarded as one of the mostpotential next generation memory with clear advantages such as its simple structure,nondestructive read-out operation, non-volatility, low power dissipation, high endurance, highspeed writing, high density, irradiation hardness, and compatible with the process ofintegrated circuit (IC). However, FeFETs have not been put into practical application as aresult of its relatively short retention time. Additionally, how to reduce the powerconsumption and improve the stability of the system on chip will prove to be a problem forpeople when the FeFETs are commonly used. In order to solve these two problems, firstly, inthis thesis, the advences of the ferroelectric materials and ferroelectric memory are reviewedin the introduction, including the classification and physical characteristics of the ferroelectricthin films, and the development history, current status and existing problems of theferroelectric memory. Then, on the basis of introduction, the retention propery of ferroelectricthin film capacitor and the negative capacitance effect of FeFET are mainly investigated bycombining the theoretical modeling and numerical analysis. The main contents andconclusions are as follows:1. Depolarization field in metal-ferroelectric-insulator-semiconductor (MFIS) capacitorswith a ferroelectric-electrode interface layer was derived theoretically in this work. Thepolarization relaxation characteristics were investigated in details based on Lou’s polarizationretention model. It is found that the retention time of MFIS capacitor can be improvedeffectively by using relatively high dielectric constant ferroelectric thin film and relativelythick ferroelectric thin film. Additionally, a good ferroelectric-electrode interface layer andrelatively high doping concentration of semiconductor silicon can help to improve theretention time of MFIS capacitor. The results may provide some insights into the design andthe retention property improvement of MFIS-FET as nonvolatile memory.2. Based on the Landau-Ginzburg-Devonshire theory, the Poisson’s equation, and thecurrent continuity equation, the surface potential and drain current of double-gatemetal-ferroelectric-insulator-semiconductor (MFIS) feld-effect transistor were investigatedby using the ferroelectric negative capacitance (NC). The derived results demonstrated thatthe up-converted semiconductor surface potential and low subthreshold swing S=34(<60mV/dec) can be realized with appropriate thicknesses of ferroelectric thin flm and insulatorlayer at room temperature. What’s more, a reduction of gate voltage about260mV can bereached if the ON-state current is fxed to600μA/μm. It is expected that the derived results can offer useful guidelines for the application of low power dissipation in ongoing scaling ofFETs.3. Based on chapter3, an interface layer model was proposed for the double-gateferroelectric feld-effect transistor (FeFET). The surface potential and subthresholdcharacteristics in negative capacitance (NC) double-gate ferroelectric field-effect transistorwere investigated by considering the metal-ferroelectric interface layer. The derived resultsindicates that the negative capacitance regime which allows for amplified surface potentialand steeper subthreshold characteristics were significantly affected by the interface layer. Thisimposes a severe limit to the step-up conversion capability and steeper subthreshold (<60mV/dec) obtainable in the device. These results may provide some insight into the design andperformance improvement for the low power dissipation FeFETs.4. Based on the temperature dependence ferroelectric negative capacitance, the electricalproperties of negative capacitance (NC) ferroelectric feld-effect transistors (FeFETs) weretheoretically investigated in the temperature range from280to360K. The derived resultsindicate that for a fxed thickness of ferroelectric thin flm the amplifcation of surfacepotential can be tuned by temperature. The transfer and output characteristics degrade withincreasing temperature due to the gradual loss of ferroelectric NC effect. It is expected thatthe derived results may provide some insight into the design and performance improvementfor the low power dissipation applications of FeFETs.5. The electrical properties of surrounding-gate (SG) metal-ferroelectric-semiconductor(MFS) FETs were theoretically investigated by considering the ferroelectric negativecapacitance (NC) effect. The derived results demonstrated that the NC-SG-MFS-FET displayssuperior electrical properties compared with that of the traditional SG-MIS-FET, in terms ofbetter electrostatic control of the gate electrode over the channel, smaller subthreshold swing(S <60mV/dec), and bigger value of ION. It is expected that this investigation may providesome insight into the design and performance improvement for the fast switching and lowpower dissipation applications of ferroelectric FETs.