| The current data rate of the uplink burst optical signal in GPON (Giga-bits Passive Optical Network) system is 1.25Gbit/s. But the growing bandwidth demands require for higher uplink data speed, so the 3.125Gbps may become the main uplink data speed for the next generation of GPON which brings a lot of problems in its burst mode receiver designing works. On the other hand, the bit error ratio test on a certain receiving optical power of the uplink data is an important parameter of optical burst mode receiver which is the bottleneck of its development and production and engineering debugging. As the GPON is much different from the EPON which has a burst gap from 0.3 to1μs, so it can be tested with a equivalent bit error ratio test in continuous signal. The burst gap of GPON is very small which is only about 32bits time in a 1.25Gbps signal, can not be tested with the same equivalent method. The new bit error ratio test for it must be studied and developed.This paper presents two burst mode receiver designs one for 3.125 Gbps signal and the other for standard GPON signal with respectively a small and large coupling capacitor for the AC coupled receiver. The designs have been proved by SIMULIK simulation platform. The receiving theory and bit error ratio test of the above high speed burst mode signal have been studied and the system design implementation based on the theory and technique in this paper have been realized.The experiment carried has proved its validity.The main content of this paper1. Considering the packet structure and Pattern Features of GPON uplink burst signal, the theory is analyzed of the coupling capacitor effect for signal recovering in AC-coupled burst mode receiver. Two designs for AC-coupled high speed burst mode receiver are presented. One takes a large coupling capacitor for the purpose of less signal receiving loss which have a high speed reset switch for coupling capacitor charge release, so as to avoid the small burst signal been buried by the large burst signal on heel of it. The other takes a small coupling capacitor with frequency compensation for the main amplifier to accomplish the burst signal receiving.2. A theory model for TDMA optical signal generation system is presented which has the features of both PON system and TDMA signal. The model is implemented in two aspects, one is generating the source signal for stimulating and analyzing the burst mode receiver, the other is designing and realizing the transmitting code generator and the receiving code generator.3. A design of high speed burst mode bit error tester based on FPGA chip is presented in this paper. A error bit comparison method is developed according to the TDMA signal error bit feature. In the comparison, a special sequence code is adopted as delimiter. A byte boundary measurement and alignment similar to the frame synchronizing is designed to check the effective data beginning in a burst and accomplish error bit comparison. Based on the above work, the logic platform of burst mode signal bit error testing system is designed and a system controlling section with an embed micro-CPU is realized.4. The signal integrality theory and its implementation in high speed burst mode signal bit error rate tester are studied. Utilizing the methods presented in this paper, the power distribution and clock distribution circuits based on FPGA chip are stimulated and designed. Also the problems in high speed PCB design including termination, crosstalk, time sequence, EMC, impedance matching etc is studied and solved. And the high speed burst mode bit error rate testing hardware circuits is finally accomplished.Above all, for the theory analyzing and the whole designing works, the test for the system implementing is carried out. The outcome indicates that the bit error ratio, the signal to noise ratio and jitter of the received burst signal are all meet or exceed the requirement of the GPON standard, and valuable for real implementation.
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