A New Measurement Method For Nano-cmos Devices And For The Reliability Study

With aggresive reduction of the size of CMOS devices and shrink of the thicknessof gate dielectrics,negative bias temperature instability (NBTI) becomes one of themost critical factors limiting the lifetime of devices.However,the mechanism ofNBTI is still under debate.The reason is,on one hand,due to the differentexplanations for NBTI effects.On the other hand,it is limited by the characterizationtechniques,which cannot pick up the full information of Nl3TI degradation.Therefore,the mechanism of NBTI cannot be built properly.In this paper,we systematicallyanalyzed and compared the characterization methods for CMOS devices,and furtherdeveloped a novel technique.Finally,we applied these techniques to investigate NBTIwith more advanced accuracy.In terms of characterization of threshold voltage (V_TH),the reason of the recoveryof threshold voltage shift (ΔV_TH) obtained using slow I_d-V_g measurement is discussedin details.The problems of fast measurement method developed by Kerber et al arediscussed,and the improved fast pulse I_d-V_g measurement (FPM) is built withmeasurement time t_M=1μs, which strongly suppresses the recovery duringmeasurement.It is found that the longer tM is,the larger theΔV_TH is.Theexperimental results show the importance of the fast measurement.For the characterization of interface trap (N_IT),the principle,measurement setup ofconventional charge pumping (CCP) and direct-current current-voltage (DCIV) areillustrated,as well as the fast DCIV measurement.The interface trap generation (ΔN_IT)obtained by CCP and DCIV methods with different measurement steps is different,indicating the recovery during CCP and DCIV measurements.To avoid the recovery during measurement ofΔN_IT,we developed a novelon-the-fly interface trap (OFIT) measurement.The principle,measurement setup andcircuit realization of the OFIT method are analyzed in details.Then,the OFIT methodis applied to measure the stress inducedΔN_IT.Some main results are obtained asfollows:(1) TheΔN_IT measured by OFIT method are much larger than that by CCPmethod.The power law time exponent n ofΔN_IT increases linearly with T whenT＜100℃,and saturates at n=0.18 when T＞100℃.The results showΔN_IT obeys themechanism of R-D model with dispersive transport of H₂,which is different fromArrhenius relationship obtained by the CCP method.(2) Within the measurement error,n is independent of the oxide field and EOT of gate dielectrics.(3) The comparison ofinterface trap generationΔN_IT detected by CCP,DCIV and OFIT methods,under samestress conditions,shows that theΔN_IT measured by CCP method is the smallest due to its serious recovery effect,whileΔN_IT measured by DCIV takes the second place andΔN_IT measured by OFIT method is the largest.The n is 0.31,0.28 and 0.18 for CCP,DCIV and OFIT methods,respectively,at 100℃.The less n represents the lessrecovery effct.(4) Comparing the slow I_d-V_g and OFIT results,it shows thatΔN_ITmeasured by slow I_d-V_g measurement,besides oxide trapped charges qΔN_OX,hasalready been partially recovered due to the measurement delay.Using our newly developed OFIT and FPM measurement methods,the reliable andquantitative assessments for NBTI degradation of PNO and TNO pMOSFETs arereported.(1) Different from previous reports,both TNO and PNO devices have thesame power law index n of the interface trap generation and temperature dependenceof n,which linearly increases with T when T＜100℃and saturated at n=0.18 when T＞100℃,and the same activation energy E_A=0.17eV,supporting the same interface trapdegradation mechanism of R-D model with dispersive transport of H₂.(2) Therecovery fraction ofΔN_IT andΔV_TH for TNO device is about 10% larger than that forPNO device.(3) TheΔV_TH caused by interface trapΔV_TH^IT and oxide chargeΔV_TH^OXcan be decomposed quantitatively combining the OFIT and FPM methods.For PNOdevices,the interface trap generation is a dominating component in NBTI degradation,while the hole trapping is a main part for TNO devices.(4) The fast transientΔV_TH ofvoltage dependence measured by FPM for both PNO and TNO devices is alsoaddressed,which shows that the overall NBTI degradation in TNO devices is largerthan that in PNO devices,due to the largerΔV_TH^OX component as well as theΔV_TH^ITcomponent.It is important that when V_g is reduced to 2V or lower around theoperation voltage of the MOSFET with EOT=3.5 nm gate oxide,after 1000 s stress,ΔV_TH for PNO device is reduced to less than 10mV and theΔV_TH^OX becomesnegligible.While for TNO device,there is still pretty largeΔV_TH as high as 30inV.Besides,the first principle calculation shows that the largerΔV_TH^OX component inTNO device can be explained by the Si-N-Si associated with hole trap concentrationpeak at Si/SiON interface with larger charge moment.These results will produce theguidance of improvement for the device performance and technological process.